Display Refresh Elements

GR5525 provides rich sets of display refresh elements, as listed below.

Table 2 GR5525 display refresh element summary 1
System Main Frequency	X-Flash	External QSPI Frequency	SRAM	QSPI0	QSPI1
96 MHz	512 KB/1 MB or external Flash	48 MHz	256 KB	NOR Flash (read in XIP mode) NAND Flash (access in register mode) Q-PSRAM (read/write in XIP mode) Display DMA0 (register mode) DMA0/DMA1 (XIP mode) Dynamic adaptive endian Multiple types of static endian 1-line/2-line/4-line mode	NOR Flash (read in XIP mode) NAND Flash (access in register mode) Q-PSRAM (read/write in XIP mode) Display DMA0/DMA1 (register mode) DMA0/DMA1 (XIP mode) Dynamic adaptive endian Multiple types of static endian 1-line/2-line/4-line mode

Table 3 GR5525 display refresh element summary 2
QSPI2	DMA	SPIM	DSPI
NOR Flash (read in XIP mode) NAND Flash (access in register mode) Q-PSRAM (read/write in XIP mode) Display DMA1 (register mode) DMA0/DMA1 (XIP mode) Dynamic adaptive endian Multiple types of static endian 1-line/2-line/4-line mode	2 instances Linked List Scatter Gather Large FIFO depth	48 MHz	48 MHz

Major display refresh elements are categorized as follows:

Computing power
1. CPU
Persistent storage of materials/texture data
1. NOR Flash
2. NAND Flash
3. XQSPI Flash (remaining code space, part of which can be used to store data)
Computation and buffer space
1. 256 KB on-chip SRAM
2. External QSPI PSRAM up to 512 Mbit
Data transmission enhancement/Frame rate acceleration
1. DMA0/DMA1
Display interfaces (covering MIPI DBI Type-C interface)
1. QSPI interface
2. SPI master interface
3. Display SPI interface (3-line/4-line SPI)

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