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Power Modes

GR551x SoCs operate in three modes: active, idle, and sleep.

  • Active mode

    In this mode, the CPU of GR551x SoCs runs at full speed. Typical scenarios in this mode are described below:

    • The MCU subsystem (including Arm processor, SRAM, and peripherals) remains in standby or active state.
    • The Bluetooth subsystem (including RF transceiver and communication core) remains in standby or active state.
    • The PMU subsystem (including DC/DC, LDO, and RTC) remains in active state.
  • Idle mode

    This mode is implemented by Wait For Interrupt/Wait For Event (WFI/WFE) command built in the Arm processor. When the WFI/WFE command is called, the program counter (PC) points to the address of the WFI/WFE command; when an interrupt request (IRQ) or event occurs and CPU wakes up, the PC points to the next command and subsequent commands are executed. The system detects the use of peripherals/Bluetooth subsystem/Timer and decides whether to enter this mode.

  • Sleep mode

    In this mode, a high-frequency clock source HFXO_32M stops working; MCU subsystem (except for Retention SRAM) and Bluetooth subsystem are powered off. Only the always-on (AON) domains are powered, to make sure data in Retention SRAM is not lost, and to power the modules or I/Os that can wake up the system from sleep mode: Bluetooth LE Timer, Sleep Timer, Real Time Calendar, and AON GPIOs. When no task is pending, the system can enter sleep mode.

The system automatically switches between the power modes, as shown in the figure below.

Figure 1 Mode switching mechanism

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