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Block Diagram

The block diagram of GR5526 is shown in the figure below.

Figure 1 GR5526 block diagram
  • Bluetooth subsystem
    • A 2.4 GHz transceiver and a digital communication core that supports Bluetooth 5.3
  • MCU subsystem
    • An ARM® Cortex®-M4F with all the required memories and peripherals
    • Security cores that can be used for application security and secure boot implementation
    • GPU + DC to enhance processing capabilities
  • Power management unit (PMU) subsystem
    • All the required power management modules to supply sufficient power for both internal modules and external peripherals
    • Modules required for ultra-low-power operation are in standby mode. HFRC_192M, RNG_OSC, LFRC_32K, wakeup GPIOs (Wake up), low-power comparator (LP Comp.), and power state controller (Power Sequencer) are used to control the state of different modules

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