Debug Interfaces

The GR5526 SoCs are built around a Cortex^®-M4F with FPU core which contains hardware extensions for advanced debugging features. The debug extensions allow the core to be stopped either on a given instruction fetch (breakpoint) or data access (watchpoint). When the core is stopped by connecting an external debugger to a serial wire debug (SWD) interface, the internal core state and the external system state may be examined. Once examination is completed, the core and the system may be restored, and program execution may be resumed.

The GR5526 supports the following debug and trace features:

• Two-pin SWD interface
• Flash patch and breakpoint (FPB) unit support
  • Two literal comparators
  • Sixteen instruction comparators
• Data watchpoint trigger (DWT) unit
• Instrumentation trace and macrocell (ITM)
• Trace port interface unit (TPIU)
  • 4-bit parallel trace of ITM trace data
  • Serial wire output (SWO) trace of ITM data