Dual Timer

Introduction

The Dual Timer module consists of two programmable down counters (32-bit or 16-bit) that can generate interrupts when they reach 0. Since the Dual-Timer is in the MCU Subsystem domain, Dual-Timer interrupt is not available during sleep, and the running Dual-Timer will not prevent the MCU from sleeping. If the RELOAD register is configured with a value, the Dual-Timer immediately counts down from the RELOAD value; if the BG_LOAD register is configured with a value, the Dual-Timer starts counting down again with the BG_LOAD value after the current counting cycle is completed. If BG_LOAD value is set before Dual-Timer is initialized, the BG_LOAD value will be invalid after the Dual-Timer is initialized with RELOAD value.

Main Features

A 32-bit or 16-bit counter
One of the following timer modes:
- Periodic
- One-shot
- Free-running
The clock source of the Dual Timer follows the system clock
Dual Timer has a prescaler that can divide down the enabled timer clock rate by 1, 16, or 256.
Dual Timer pauses when the MCU is suspended.

Functional Description

In Dual Timer, both of the counters are defined by default. For each counter, the following operational modes are available:

Free-running mode
The counter wraps after reaching zero, and continues to count down from the maximum value (0xFFFFFFFF). This is the default mode.

Periodic mode
The counter generates an interrupt at a fixed interval, reloading the original value after wrapping past zeros.

One-shot mode
The counter generates an interrupt once. When the counter reaches 0, it halts until you reprogram it.
When the value of the RELOAD register is configured to 0, no count and no interrupt are generated.

The RELOAD value only represents the count-down number of timers. If you want to configure a specific duration (for example, µs, ms, or s), you need to use the following formula:

Expect_time (s) = RELOAD /(SystemCoreClock / PRE - 1)

where PRE stands for prescaled coefficient.

Registers

RELOAD

Name: Dual Timer Reload Register
Description: This register contains the value from which the counter is to decrease. The count is immediately restarted from the new RELOAD value.
Base Address: 0x40002000
Offset: 0x00 + x*0x20
Reset Value: 0x00

Note:

*x is used to identify the counter of the Dual Timer Module. The “x” can be 0 or 1.

表 179 RELOAD Register
Bits	Field Name	RW	Reset	Description
31:0	RELOAD_VALUE	RW	0x0	Reload value. Write to this register sets the current value.

VAL

Name: Dual Timer Current Value Register
Description: This register provides the current count value of the decrementing counter.
Base Address: 0x40002000
Offset: 0x04 + x*0x20
Reset Value: 0xFFFFFFFF

表 180 VAL Register
Bits	Field Name	RW	Reset	Description
31:0	CUR_VALUE	RO	0xFFFFFFFF	Current count value

CTRL

Name: Dual Timer Control Register
Description: This register enables the software to control the Dual Timer.
Base Address: 0x40002000
Offset: 0x08 + x*0x20
Reset Value: 0x20

表 181 CTRL Register
Bits	Field Name	RW	Reset	Description
31:8	RSVD	R		Reserved bits
7	EN	RW	0x0	Timer enable Value: 0x0: Timer disabled; default 0x1: Timer enabled
6	MODE	RW	0x0	Timer mode Value: 0x0: Timer is in free-running mode; default 0x1: Timer is in periodic mode
5	INT_EN	RW	0x1	Interrupt enable Value: 0x0: Timer interrupt disabled 0x1: Timer interrupt enabled; default
4	RSVD	R		Reserved bits
3:2	PRE	RW	0x0	Prescale bits Value: 0x00: 0 stage of prescale, clock is divided by 1; default 0x01: 4 stages of prescale, clock is divided by 16 0x10: 8 stages of prescale, clock is divided by 256 0x11: Undefined. Do not use this value.
1	SIZE	RW	0x0	Select 16-bit or 32-bit counter operation: Value: 0x0: 16-bit counter; default 0x1: 32-bit counter
0	COUNT_MODE	RW	0x0	Select wrap mode or one-shot mode: Value: 0x0: Wrap mode; default 0x1: One-shot mode

INT_CLR

Name: Dual Timer Interrupt Clear Register
Description: Any write to the INT_CLR register clears the interrupt output from the counter.
Base Address: 0x40002000
Offset: 0x0C + x*0x20
Reset Value: 0x00

表 182 INT_CLR Register
Bits	Field Name	RW	Reset	Description
31:0	STAT	WO	0x0	Clear the Dual-Timer interrupt event.

RAW_INT_STAT

Name: Dual Timer Raw Interrupt Status Register
Description: The RAW_INT_STAT register indicates the raw interrupt status from the counter.
Base Address: 0x40002000
Offset: 0x10 + x*0x20
Reset Value: 0x00

表 183 RAW_INT_STAT Register
Bits	Field Name	RW	Reset	Description
31:1	RSVD	R		Reserved bits
0	STAT	RO	0x0	Raw interrupt status from the counter

INT_STAT

Name: Dual-Timer interrupt enable status register
Description: The INT_STAT register indicates the masked interrupt status from the counter.
Base Address: 0x40002000
Offset: 0x14 + x*0x20
Reset Value: 0x00

表 184 INT_STAT Register
Bits	Field Name	RW	Reset	Description
31:1	RSVD	R		Reserved bits
0	STAT	RO	0x0	Enable interrupt status from the counter.

BG_LOAD

Name: Dual-Timer background reload register
Description: When the BG_LOAD value is set, the counter will count down again from the BG_LOAD value after completing the current counting cycle.
Base Address: 0x40002000
Offset: 0x18 + x*0x20
Reset Value: 0x00

表 185 BG_LOAD Register
Bits	Field Name	RW	Reset	Description
31:0	BG_LOAD_VALUE	RW	0x0	The BG_LOAD does not cause the counter to immediately restart from the new value.