Mixed Signal I/O

Introduction

The device has up to 10 individually configurable MSIOs that can be applied by peripherals, digital input/output or analog input.

Functional Description

I/O default state is high impendence mode.
As analog input for sense ADC or comparator.
As digital GPIOs for input/output, no interrupt.
To multiplex some different peripherals.

Registers

MSIO_A_PAD_CFG0

Name: MSIO Pad Control Register
Description: This register contains the input and output data.
Base Address: 0x4000AA00
Offset: 0x00
Reset Value: 0x00000000

表 292 MSIO_A_PAD_CFG0
Bits	Field Name	RW	Reset	Description
31:30	RSVD	R		Reserved bits
29:20	IN_val	R	0x0	MSIO input digital value
19:10	oe	RW	0x0	MSIO output enable (active low) Value: 0x1: Enable MSIO_x output. 0x0: Disable MSIO_x output.
9:0	OUT_VAL	RW	0x0	MSIO output value (valid in output mode)

MSIO_A_PAD_CFG1

Name: MSIO Pad Control Register
Description: This register contains the MSIO configurations.
Base Address: 0x4000AA00
Offset: 0x04
Reset Value: 0x00000000

表 293 MSIO_A_PAD_CFG1
Bits	Field Name	RW	Reset	Description
31:30	RSVD	R		Reserved bits
29:20	IE	RW	0x0	MSIO input enabled Value: 0x0: Disable input. 0x1: Enable input.
19:10	PS	RW	0x0	MSIO resistor type Value: 0x0: Pull-down. 0x1: Pull-up.
9:0	PE	RW	0x0	Pull up/down enable control for MSIO pad Value: 0x0: Disabled 0x1: Enabled

MSIO_A_PAD_CFG2

Name: MSIO Pad Control Register
Description: This register contains the MSIO configurations.
Base Address: 0x4000AA00
Offset: 0x08
Reset Value: 0x00000000

表 294 MSIO_A_PAD_CFG2
Bits	Field Name	RW	Reset	Description
31:30	RSVD	R		Reserved bits
29:20	POE	RW	0x0	MSIO parametric output enable Value: 0x0: Disabled 0x1: Enabled
19:10	SR	RW	0x0	MSIO slew rate Value: 0x0: Fast slew rate. 0x1: Slow slew rate.
9:0	IS	RW	0x0	MSIO input type Value: 0x0: CMOS input 0x1: Schmitt input

MSIO_A_PAD_CFG3

Name: MSIO Pad Control Register
Description: This register contains the MSIO configurations.
Base Address: 0x4000AA00
Offset: 0x0C
Reset Value: 0x3FFFFC00

表 295 MSIO_A_PAD_CFG3
Bits	Field Name	RW	Reset	Description
31:30	RSVD	R		Reserved bits
29:20	AE	RW	0x3FF	Analog enable control for MSIO pad Value: 0x0: Digital mode 0x1: Analog mode
19:10	DS1	RW	0x3FF	MSIO output drive strength (low bit) Value: 0x0: Weak mode 0x1: Strong mode
9:0	DS0	RW	0x0	MSIO output drive strength (high bit) Value: 0x0: Weak mode 0x1: Strong mode

MSIO_MCU_OVR

Name: MSIO Using MCU Domain Setting Control Register
Description: This register controls MSIO using the settings from the MCU domain.
Base Address: 0x4000AA00
Offset: 0x10
Reset Value:0x00000000

表 296 MSIO_A_PAD_MCU_OVR
Bits	Field Name	RW	Reset	Description
31:10	RSVD	R		Reserved bits
9:0	ovr	RW	0x0	Use the settings from MCU domain, only valid when MCU domain is ON Value: 0: Use settings in MSIO_A_PAD_CFG as GPIO. 1: Use PAD MUX settings in MCU.

Electrical Specifications

The electrical parameters for the MSIO_0–MSIO_7 are as follows:

表 297 MSIO_0 – MSIO_7 electrical specifications
Parameter	Description	Min.	Typ.	Max.	Unit
V_IH	Input high voltage	VBATL x 0.7		VBATL	V
V_IL	Input low voltage	VSS		VBATL x 0.3	V
V_OH,L	Output high voltage, 2.5 mA, VDDIO ≥ 2.0 V	VBATL - 0.4		VBATL	V
V_OH,M	Output high voltage, 2.5 mA, VDDIO ≥ 2.5 V	VBATL - 0.4		VBATL	V
V_OH,H	Output high voltage, 2.5 mA, VDDIO ≥ 3 V	VBATL - 0.4		VBATL	V
V_OL,L	Output low voltage, 2.5 mA, VDDIO ≥ 2.0 V	VSS		VSS + 0.4	V
V_OL,M	Output low voltage, 2.5 mA, VDDIO ≥ 2.5 V	VSS		VSS + 0.4	V
V_OL,H	Output low voltage, 2.5 mA, VDDIO ≥ 3 V	VSS		VSS + 0.4	V
I_OL,L	Current at VSS + 0.4 V, output set low, VDDIO ≥ 2.0 V	2		12	mA
I_OL,M	Current at VSS + 0.4 V, output set low, VDDIO ≥ 2.5 V	2		12	mA
I_OH,L	Current at VDDIO - 0.4 V, output set high, VDDIO ≥ 2.0 V	2		12	mA
I_OH,M	Current at VDDIO - 0.4 V, output set high, VDDIO ≥ 2.5 V	2		12	mA
t_RF,9pF	Rise time, 10%–90%, 9 pF load	1.6		13	ns
t_RF,9pF	Fall time, 10%–90%, 9 pF load	1.9		14.2	ns
R_PU	Pull-up resistance	12	20	32	kΩ
R_PD	Pull-down resistance	12	20	32	kΩ
C_PAD	Pad capacitance		5		pF

The electrical parameters for the MSIO_8–MSIO_9 are as follows:

表 298 MSIO_8 – MSIO_9 electrical specifications
Parameter	Description	Min.	Typ.	Max.	Unit
V_IH	Input high voltage	VDDIO x 0.7		VDDIO	V
V_IL	Input low voltage	VSS		VDDIO x 0.3	V
V_OH,L	Output high voltage, 4 mA, VDDIO ≥ 2.0 V	VDDIO - 0.4		VDDIO	V
V_OH,M	Output high voltage, 4 mA, VDDIO ≥ 2.5 V	VDDIO - 0.4		VDDIO	V
V_OH,H	Output high voltage, 4 mA, VDDIO ≥ 3 V	VDDIO - 0.4		VDDIO	V
V_OL,L	Output low voltage, 4 mA, VDDIO ≥ 2.0 V	VSS		VSS + 0.4	V
V_OL,M	Output low voltage, 4 mA, VDDIO ≥ 2.5 V	VSS		VSS + 0.4	V
V_OL,H	Output low voltage, 4 mA, VDDIO ≥ 3 V	VSS		VSS + 0.4	V
I_OL,L	Current at VSS+0.4 V, output set low, VDDIO ≥ 2.0 V	2		12	mA
I_OL,M	Current at VSS+0.4 V, output set low, VDDIO ≥ 2.5 V	2		12	mA
I_OH,L	Current at VDDIO-0.4 V, output set high, VDDIO ≥ 2.0 V	2		12	mA
I_OH,M	Current at VDDIO-0.4 V, output set high, VDDIO ≥ 2.5 V	2		12	mA
t_RF,9pF	Rise time, 10%–90%, 9 pF load	1.6		13	ns
t_RF,9pF	Fall time, 10%–90%, 9 pF load	1.9		14.2	ns
R_PU	Pull-up resistance	12	20	32	kΩ
R_PD	Pull-down resistance	12	20	32	kΩ
C_PAD	Pad capacitance		5		pF
V_IH	Input high voltage	VDDIO x 0.7		VDDIO	V
V_IL	Input low voltage	VSS		VDDIO x 0.3	V
V_OH,L	Output high voltage, 2.5 mA, VDDIO ≥ 2.0 V	VDDIO - 0.4		VDDIO	V
V_OH,M	Output high voltage, 2.5 mA, VDDIO ≥ 2.5 V	VDDIO - 0.4		VDDIO	V
V_OH,H	Output high voltage, 2.5 mA, VDDIO ≥ 3 V	VDDIO - 0.4		VDDIO	V
V_OL,L	Output low voltage, 2.5 mA, VDDIO ≥ 2.0 V	VSS		VSS + 0.4	V
V_OL,M	Output low voltage, 2.5 mA, VDDIO ≥ 2.5 V	VSS		VSS + 0.4	V
V_OL,H	Output low voltage, 2.5 mA, VDDIO ≥ 3 V	VSS		VSS + 0.4	V
I_OL,L	Current at VSS + 0.4 V, output set low, VDDIO ≥ 2.0 V	2		12	mA
I_OL,M	Current at VSS + 0.4 V, output set low, VDDIO ≥ 2.5 V	2		12	mA
I_OH,L	Current at VDD - 0.4 V, output set high, VDDIO ≥ 2.0 V	2		12	mA
I_OH,M	Current at VDD - 0.4 V, output set high, VDDIO ≥ 2.5 V	2		12	mA
t_RF,9pF	Rise time, 10%–90%, 9 pF load	1.6		13	ns
t_RF,9pF	Fall time, 10%–90%, 9 pF load	1.9		14.2	ns
R_PU	Pull-up resistance	12	20	32	kΩ
R_PD	Pull-down resistance	12	20	32	kΩ
C_PAD	Pad capacitance		5		pF