Functional Description
Different pin mux corresponds to different signals, as shown in the table below.
MUX | Signal | MUX | Signal | MUX | Signal | MUX | Signal |
---|---|---|---|---|---|---|---|
0 |
GPIO |
14 |
PWM0_B |
28 |
COEX_BLE_RX |
42 |
SPI_M_CLK |
1 |
I2C0_SCL |
15 |
PWM0_C |
29 |
COEX_BLE_TX |
43 |
SPI_M_CS0_N |
2 |
I2C0_SDA |
16 |
PWM1_A |
30 |
COEX_WLAN_RX |
44 |
SPI_M_CS1_N |
3 |
I2C1_SCL |
17 |
PWM1_B |
31 |
COEX_WLAN_TX |
45 |
SPI_M_MISO |
4 |
I2C1_SDA |
18 |
PWM1_C |
32 |
COEX_BLE_IN_PROCESS |
46 |
SPI_M_MOSI |
5 |
UART0_CTS |
19 |
DF_ANT_SW_0 |
33 |
SWD_CLK |
47 |
RESERVED |
6 |
UART0_RTS |
20 |
DF_ANT_SW_1 |
34 |
SWD_DATA |
48 |
RESERVED |
7 |
UART0_TX |
21 |
DF_ANT_SW_2 |
35 |
RESERVED |
49 |
DUALTIMER_1A |
8 |
UART0_RX |
22 |
DF_ANT_SW_3 |
36 |
RESERVED |
50 |
DUALTIMER_1B |
9 |
UART1_CTS |
23 |
DF_ANT_SW_4 |
37 |
RESERVED |
51 |
DUALTIMER_1C |
10 |
UART1_RTS |
24 |
DF_ANT_SW_5 |
38 |
SPI_S_MOSI |
52 |
DUALTIMER_2A |
11 |
UART1_TX |
25 |
DF_ANT_SW_6 |
39 |
SPI_S_CS_N |
53 |
DUALTIMER_2B |
12 |
UART1_RX |
26 |
FERP_GPIO_TRIG_0 |
40 |
SPI_S_CLK |
54 |
DUALTIMER_2C |
13 |
PWM0_A |
27 |
SWO |
41 |
SPI_S_CS0_N |
55 |
TEST_BUS |