Functional Overview

The device integrates a 32-bit Arm^® Cortex^®-M4F core as the processor with a floating-point unit (FPU) which maximizes code density and offers highly efficient processing with lower energy. The architecture is shown in the figure below.

The Cortex^®-M4F is built on a high-performance processor core with a 3-stage pipeline Harvard architecture, making it ideal for demanding embedded applications. The processor delivers exceptional power efficiency through an efficient instruction set and extensively optimized design, providing high-end processing hardware including optional IEEE754-compliant single-precision floating-point computation, a range of single-cycle and SIMD multiplication and multiply-with-accumulate capabilities, saturating arithmetic and dedicated hardware division.

The Cortex^®-M4F processor implements a version of the Thumb^® instruction set based on Thumb-2 technology, ensuring high code density and reduced program memory requirements. The Cortex^®-M4F instruction set provides exceptional performance expected of a modern 32-bit architecture, with the high code density of 8-bit and 16-bit microcontrollers (MCUs).

The Cortex^®-M4F processor closely integrates a configurable Nested Vectored Interrupt Controller (NVIC), to deliver industry-leading interrupt performance. The NVIC includes a Non Maskable Interrupt (NMI) that can provide up to 256 interrupt priority levels. The tight integration of the processor core and NVIC provides fast execution of Interrupt Service Routines (ISRs), dramatically reducing the interrupt latency. This is achieved through the hardware stacking of registers, and the ability to suspend load-multiple and store-multiple operations. Interrupt handlers do not require wrapping in assembler code, or removing any code overhead from the ISRs. A tail-chain optimization also significantly reduces the overhead when switching from one ISR to another. The Cortex^®-M4F processor includes many debug features that allow developers to analyze design problems easily. In addition, its standard design features (such as halting and single stepping) that can be found in most microcontrollers allow developers to generate a trace to capture program flow, data changes, profiling information, and more.