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文档中心 > GR533x Datasheet/ Peripherals/ I/O/ Always-On I/O Copy URL

Always-On I/O

Introduction

The device has up to eight individually configurable AON_GPIOs that can be applied by peripherals or digital input/output.

Functional Description

  • I/O default state is input mode with pull-down.
  • Can be configured as being triggered by high level, low level, rising edge, falling edge, or both edges.
  • As wakeup sources from sleep
  • Output some slow-speed clocks.
  • As digital GPIOs for input/output
  • To multiplex some different peripherals

Registers

AON_PAD_CTRL0

  • Name: Always-on Pad Control Register
  • Description: This register contains the AON_GPIO configurations.
  • Base Address: 0x4000AA14
  • Offset: 0x0
  • Reset Value: 0x00FF00FF
表 285 AON_PAD_CTRL_0
Bits Field Name RW Reset Description

31:24

RSVD

R

Reserved bits

23:16

IE

RW

0xFF

Always-on PAD input enable

Value:

  • 0x0: Disable input.

  • 0x1: Enable input.

15:8

PS

RW

0x0

Always-on PAD resistor type

Value:

  • 0x0: Pull-down.

  • 0x1: Pull-up.

7:0

PE

RW

0xFF

Always-on PAD pull up/down resister enable

Value:

  • 0x0: Disable AONx resistor.

  • 0x1: Enable AONx resistor.

AON_PAD_CTRL1

  • Name: Always-on Pad Control Register
  • Description: This register contains the AON_GPIO configurations.
  • Base Address: 0x4000AA14
  • Offset: 0x4
  • Reset Value: 0x00000000
表 286 AON_PAD_CTRL_1
Bits Field Name RW Reset Description

31:24

RSVD

R

Reserved bits

23:16

IN_VAL

RO

0x0

AON pad input value

Value:

  • 0x0: Input AONx low.

  • 0x1: Input AONx high.

15:8

OUT_VAL

RW

0x0

AON PAD output value

Value:

  • 0x0: Drive AONx low.

  • 0x1: Drive AONx high.

7:0

OE

RW

0x00

Always-on pad output enable

Value:

  • 0x0: Enable AONx output.

  • 0x1: Disable AONx output.

AON_PAD_CTRL2

  • Name: Always-on Pad Control Register

  • Description: This register contains the AON_GPIO configurations.

  • Base Address: 0x4000AA14

  • Offset: 0x8

  • Reset Value: 0x00000000

表 287 AON_PAD_CTRL_2
Bits Field Name RW Reset Description

31:24

RSVD

R

Reserved bits

23:16

POE

RO

0x0

AON pad input value

Value:

  • 0x0: Input AONx low.

  • 0x1: Input AONx high.

15:8

SR

RW

0x0

AON PAD slew rate

Value:

  • 0x0: Fast slew rate

  • 0x1: Slow slew rate

7:0

IS

RW

0x00

AON pad input type

Value:

  • 0x0: CMOS input

  • 0x1: Schmitt input

AON_PAD_CTRL3

  • Name: Always-on Pad Control Register

  • Description: This register contains the AON_GPIO configurations.

  • Base Address: 0x4000AA14

  • Offset: 0xC

  • Reset Value: 0x0000FF00

表 288 AON_PAD_CTRL_3
Bits Field Name RW Reset Description

31:24

RSVD

R

Reserved bits

15:8

DS1

RW

0xFF

Always-on pad output drive strength (low bit)

Value:

  • 0x0: Weak mode

  • 0x1: Strong mode

7:0

DS0

RW

0x00

Always-on pad output drive strength (high bit)

Value:

  • 0x0: Weak mode

  • 0x1: Strong mode

ANO_PAD_CLK

  • Name: Always-on PAD output clock controls register
  • Description: This register controls inner clock output from AON_GPIO_4.
  • Base Address: 0x4000AA14
  • Offset: 0x10
  • Reset Value: 0x00000000
表 289 AON_PAD_CLK
Bits Field Name RW Reset Description

31:5

RSVD

R

Reserved bits

4:2

AON_GPIO4_CLK__SEL

RW

0x0

Clock out selection

Value:

  • 0x0: RNG_32K

  • 0x1: RNG_OSC

  • 0x2: LFRC_32K

  • 0x3: LFXO_32K

1

RSVD

R

Reserved bits

0

AON_GPIO4_OUT_EN

RW

0x0

Enable clock out via AON_GPIO_4.

Value:

  • 0x0: Disable selected clock out via AON_GPIO_4.

  • 0x1: Enable selected clock out via AON_GPIO_4.

AON_PAD_MCU_OVR

  • Name: Always-on Pad Control Register
  • Description: This register controls the MCU domain setting of always-on pads.
  • Base Address: 0x4000AA14
  • Offset: 0x14
  • Reset Value: 0x00000000
表 290 AON_PAD_MCU_OVR
Bits Field Name RW Reset Description

31:17

RSVD

R

Reserved bits

23:16

OVR

RW

0x0

Use the settings from MCU domain; only valid when MCU domain is ON.

  • 0x0: Disable AONx digital setting.

  • 0x1: Enable AONx digital setting.

15:0

RSVD

R

Reserved bits

Electrical Specifications

The electrical parameters for the AON_GPIO_0–AON_GPIO_7 are as follows:

表 291 AON GPIO electrical specifications
Parameter Description Min. Typ. Max. Unit
VIH Input high voltage VDDIO x 0.7 VDDIO V
VIL Input low voltage VSS VDDIO x 0.3 V
VOH,L Output high voltage, 4 mA, VDDIO ≥ 2.0 V VDDIO - 0.4 VDDIO V
VOH,M Output high voltage, 4 mA, VDDIO ≥ 2.5 V VDDIO - 0.4 VDDIO V
VOH,H Output high voltage, 4 mA, VDDIO ≥ 3 V VDDIO - 0.4 VDDIO V
VOL,L Output low voltage, 4 mA, VDDIO ≥ 2.0 V VSS VSS + 0.4 V
VOL,M Output low voltage, 4 mA, VDDIO ≥ 2.5 V VSS VSS + 0.4 V
VOL,H Output low voltage, 4 mA, VDDIO ≥ 3 V VSS VSS + 0.4 V
IOL,L Current at VSS+0.4 V, output set low, VDDIO ≥ 2.0 V 2 12 mA
IOL,M Current at VSS+0.4 V, output set low, VDDIO ≥ 2.5 V 2 12 mA
IOH,L Current at VDDIO-0.4 V, output set high, VDDIO ≥ 2.0 V 2 12 mA
IOH,M Current at VDDIO-0.4 V, output set high, VDDIO ≥ 2.5 V 2 15 mA
tRF,9pF Rise time, 10%–90%, 9 pF load 1.6 13 ns
tRF,9pF Fall time, 10%–90%, 9 pF load 1.9 14.2 ns
RPU Pull-up resistance 12 20 32 kΩ
RPD Pull-down resistance 12 20 32 kΩ
CPAD Pad capacitance 5 pF

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