Registers
DPAD_MUX_00_03
Name: GPIO 00_03 Mux Control Register
Description: This register controls GPIO_0–GPIO_3 mux.
Base Address: 0x4000E900
Offset: 0x00
Reset Value: 0x00002221
| Bits | Field Name | RW | Reset | Description |
|---|---|---|---|---|
31:30 |
RSVD |
R |
Reserved bits |
|
29:24 |
DPAD_MUX_SEL_03 |
RW |
0x0 |
Value for GPIO_3 mux |
23:22 |
RSVD |
R |
Reserved bits |
|
21:16 |
DPAD_MUX_SEL_02 |
RW |
0x0 |
Value for GPIO_2 mux |
15:14 |
RSVD |
R |
Reserved bits |
|
13:8 |
DPAD_MUX_SEL_01 |
RW |
0x22 |
Value for GPIO_1 mux |
7:6 |
RSVD |
R |
Reserved bits |
|
5:0 |
DPAD_MUX_SEL_00 |
RW |
0x21 |
Value for GPIO_0 mux |
DPAD_MUX_04_07
Name: GPIO 04_07 Mux Control Register
Description: This register controls GPIO_4–GPIO_7 mux.
Base Address: 0x4000E900
Offset: 0x04
Reset Value: 0x00000000
| Bits | Field Name | RW | Reset | Description |
|---|---|---|---|---|
|
31:30 |
RSVD |
R |
Reserved bits |
|
|
29:24 |
DPAD_MUX_SEL_07 |
RW |
0x0 |
Value for GPIO_7 mux |
|
23:22 |
RSVD |
R |
Reserved bits |
|
|
21:16 |
DPAD_MUX_SEL_06 |
RW |
0x0 |
Value for GPIO_6 mux |
|
15:14 |
RSVD |
R |
Reserved bits |
|
|
13:8 |
DPAD_MUX_SEL_05 |
RW |
0x0 |
Value for GPIO_5 mux |
|
7:6 |
RSVD |
R |
Reserved bits |
|
|
5:0 |
DPAD_MUX_SEL_04 |
RW |
0x0 |
Value for GPIO_4 mux |
DPAD_MUX_08_11
Name: GPIO 08_11 Mux Control Register
Description: This register controls GPIO_8–GPIO_11 mux.
Base Address: 0x4000E900
Offset: 0x08
Reset Value: 0x00000000
| Bits | Field Name | RW | Reset | Description |
|---|---|---|---|---|
|
31:30 |
RSVD |
R |
Reserved bits |
|
|
29:24 |
DPAD_MUX_SEL_11 |
RW |
0x0 |
Value for GPIO_11 mux |
|
23:22 |
RSVD |
R |
Reserved bits |
|
|
21:16 |
DPAD_MUX_SEL_10 |
RW |
0x0 |
Value for GPIO_10 mux |
|
15:14 |
RSVD |
R |
Reserved bits |
|
|
13:8 |
DPAD_MUX_SEL_09 |
RW |
0x0 |
Value for GPIO_9 mux |
|
7:6 |
RSVD |
R |
Reserved bits |
|
|
5:0 |
DPAD_MUX_SEL_08 |
RW |
0x0 |
Value for GPIO_8 mux |
DPAD_MUX_12_13
Name: GPIO 12_13 mux control register
Description: This register controls GPIO_12–GPIO_13 mux.
Base Address: 0x4000E900
Offset: 0x0C
Reset Value: 0x00000000
| Bits | Field Name | RW | Reset | Description |
|---|---|---|---|---|
31:14 |
RSVD |
R |
Reserved bits |
|
13:8 |
DPAD_MUX_SEL_13 |
RW |
0x0 |
Value for GPIO_13 mux |
7:6 |
RSVD |
R |
Reserved bits |
|
5:0 |
DPAD_MUX_SEL_12 |
RW |
0x0 |
Value for GPIO_12 mux |
AON_PAD_MUX_00_03
Name: AON GPIO Pin Mux Control Register
Description: This register controls the AON GPIO pin mux.
Base Address: 0x4000E900
Offset: 0x14
Reset Value: 0x00000000
| Bits | Field Name | RW | Reset | Description |
|---|---|---|---|---|
31:30 |
RSVD |
R |
Reserved bits |
|
29:24 |
AON_PAD_MUX_SEL_03 |
RW |
0x0 |
Value for AON_GPIO_3 mux |
23:22 |
RSVD |
R |
Reserved bits |
|
21:16 |
AON_PAD_MUX_SEL_02 |
RW |
0x0 |
Value for AON_GPIO_2 mux |
15:14 |
RSVD |
R |
Reserved bits |
|
13:8 |
AON_PAD_MUX_SEL_01 |
RW |
0x0 |
Value for AON_GPIO_1 mux |
7:6 |
RSVD |
R |
Reserved bits |
|
5:0 |
AON_PAD_MUX_SEL_00 |
RW |
0x0 |
Value for AON_GPIO_0 mux |
AON_PAD_MUX_04_07
Name: AON GPIO Pin Mux Control Register
Description: This register controls the AON GPIO pin mux.
Base Address: 0x4000E900
Offset: 0x18
Reset Value: 0x00000000
| Bits | Field Name | RW | Reset | Description |
|---|---|---|---|---|
31:30 |
RSVD |
R |
Reserved bits |
|
29:24 |
AON_PAD_MUX_SEL_07 |
RW |
0x0 |
Value for AON_GPIO_7 mux |
23:22 |
RSVD |
R |
Reserved bits |
|
21:16 |
AON_PAD_MUX_SEL_06 |
RW |
0x0 |
Value for AON_GPIO_6 mux |
15:14 |
RSVD |
R |
Reserved bits |
|
13:8 |
AON_PAD_MUX_SEL_05 |
RW |
0x0 |
Value for AON_GPIO_5 mux |
7:6 |
RSVD |
R |
Reserved bits |
|
5:0 |
AON_PAD_MUX_SEL_04 |
RW |
0x0 |
Value for AON_GPIO_4 mux |
MSIO_PAD_MUX_00_03
Name: MSIO Pin Mux Control Register
Description: This register controls the MSIO pin mux.
Base Address: 0x4000E900
Offset: 0x1C
Reset Value: 0x00000000
| Bits | Field Name | RW | Reset | Description |
|---|---|---|---|---|
|
31:30 |
RSVD |
R |
Reserved bits |
|
|
29:24 |
MSIO_A_MUX_SEL_03 |
RW |
0x0 |
Value for MSIO_3 mux |
|
23:22 |
RSVD |
R |
Reserved bits |
|
|
21:16 |
MSIO_A_MUX_SEL_02 |
RW |
0x0 |
Value for MSIO_2 mux |
|
15:14 |
RSVD |
R |
Reserved bits |
|
|
13:8 |
MSIO_A_MUX_SEL_01 |
RW |
0x0 |
Value for MSIO_1 mux |
|
7:6 |
RSVD |
R |
Reserved bits |
|
|
5:0 |
MSIO_A_MUX_SEL_00 |
RW |
0x0 |
Value for MSIO_0 mux |
MSIO_PAD_MUX_04_07
Name: MSIO Pin Mux Control Register
Description: This register controls the MSIO pin mux.
Base Address: 0x4000E900
Offset: 0x20
Reset Value: 0x00000000
| Bits | Field Name | RW | Reset | Description |
|---|---|---|---|---|
31:30 |
RSVD |
R |
Reserved bits |
|
29:24 |
MSIO_A_MUX_SEL_07 |
RW |
0x0 |
Value for MSIO_7 mux |
23:22 |
RSVD |
R |
Reserved bits |
|
21:16 |
MSIO_A_MUX_SEL_06 |
RW |
0x0 |
Value for MSIO_6 mux |
15:14 |
RSVD |
R |
Reserved bits |
|
13:8 |
MSIO_A_MUX_SEL_05 |
RW |
0x0 |
Value for MSIO_5 mux |
7:6 |
RSVD |
R |
Reserved bits |
|
5:0 |
MSIO_A_MUX_SEL_04 |
RW |
0x0 |
Value for MSIO_4 mux |
MSIO_PAD_MUX_08_09
Name: MSIO Pin Mux Control Register
Description: This register controls the MSIO pin mux.
Base Address: 0x4000E900
Offset: 0x24
Reset Value: 0x00000000
| Bits | Field Name | RW | Reset | Description |
|---|---|---|---|---|
31:30 |
RSVD |
R |
Reserved bits |
|
13:8 |
MSIO_A_MUX_SEL_09 |
RW |
0x0 |
Value for MSIO_9 mux |
7:6 |
RSVD |
R |
Reserved bits |
|
5:0 |
MSIO_A_MUX_SEL_08 |
RW |
0x0 |
Value for MSIO_8 mux |
