Features
- Bluetooth LE 5.3
transceiver
- Supported data rates: 1 Mbps, 2 Mbps, and Long Range (500 kbps, 125 kbps)
- TX power:
- Up to 6 dBm on GR5330/GR5331
- Up to 15 dBm on GR5332
- RX sensitivity:
- -97.5 dBm @ 1 Mbps on GR5330/GR5331
- -99 dBm @ 1 Mbps on GR5332
- Power
consumption at 3.3 V VBAT input on
GR5330/GR5331:
- 3.8 mA TX current @ 0 dBm output power (DC-DC supply, 16 MHz system clock)
- 4.7 mA RX current @ 1 Mbps (DC-DC supply, 16 MHz system clock)
- Power consumption at 3.3 V VBAT input on GR5332:
- 5.9 mA TX current @ 0 dBm output power (DC-DC supply, 16 MHz system clock)
- 86.3 mA TX current @ 15 dBm output power (SYS_LDO supply, 64 MHz system clock)
- 4.9 mA RX current @ 1 Mbps (DC-DC supply, 16 MHz system clock)
- Arm®
Cortex®-M4F 32-bit micro-processor with floating point support:
- Up to 64 MHz clock frequency
- Built-in Memory Protection Unit (MPU) supporting eight programmable regions
- Hardware Floating Point Unit (FPU)
- Built-in Nested Vectored Interrupt Controller (NVIC)
- Non-maskable Interrupt (NMI) input
- Serial Wire Debug (SWD) with 16 breakpoints, two watchpoints, and a debug timestamp counter
- 32 µA/MHz CoreMark running from Flash @ 3.3 V, 64 MHz from HFRC
- On-chip memory
- ROM for chip bootloader, system drivers, and Bluetooth LE Protocol Stack code
- RAM for data and instruction code, with retention capabilities in sleep mode. GR5330: 64 KB; GR5331/GR5332: 96 KB
- 512 KB Flash for code, system parameter configuration, and user data
- Digital
peripherals
- 1 x general-purpose DMA engine with five channels and 16 handshaking interfaces
- Analog
peripherals
- 1 x 13-bit Sense ADC with a sampling rate of 1 Msps, supporting up to eight external I/O channels and three internal signal channels
- Built-in die temperature and voltage sensors
- Low-power comparator, supporting wakeup from sleep mode
- Flexible serial
peripherals with arbitrary mapping on all digital I/Os
- 2 x UART modules up to 2 Mbps with flow control and IrDA features
- 2 x I2C modules for peripheral communication, up to 1 MHz, operating as either Master or Slave
- 1 x 8-bit/16-bit/32-bit SPI master interface and 1 x SPI slave interface for host communication
- Security
- AES 128-bit security module (ECB, CBC)
- True random number generator (TRNG)
- I/O
peripherals
- Up to 32 multiplexed I/O pins in total
- Up to 14 general-purpose I/O (GPIO) pins with configurable pull-up/pull-down resistors
- Up to eight always-on I/O (AON I/O) pins, supporting wakeup from sleep mode
- Up to 10 mixed signal I/O (MSIO) pins, configurable to be digital/analog signal interfaces
- Up to 32 multiplexed I/O pins in total
- Timers
- 2 x 32-bit general-purpose timers
- 1 x dual timer with two programmable 32-bit or 16-bit down counters
- 1 x sleep timer for waking the device up from sleep mode
- 2 x 3-channel PWMs with edge-aligned mode and center-aligned mode
- 1 x real-time counter
- Power
management
- On-chip DC-DC/SYS_LDO to provide RF analog voltage and supply CORE_LDO
- On-chip I/O LDO to provide I/O voltage and supply external components
- Programmable thresholds for brownout detector (BOD)
- Supply voltage: 2.0 V–3.63 V
- I/O voltage: 1.8 V–3.6 V
- Low-power
consumption
- Sleep mode: 2.6 µA (Typical) at 3.3 V VBAT input, with 48 KB SRAM retention on, wakeup sources from AON I/Os, and LFXO_32K running
- Ultra deep sleep mode: 2.2 µA (Typical), with no memory data in retention and wakeup sources from SLP Timer or AON I/Os
- OFF mode: 200 nA (Typical), with system in reset mode
- Operating
temperature range
- GR5330/GR5331: -40°C to 85°C
- GR5332: -40°C to 105°C
- Packages
- QFN32: 4.0 x 4.0 x 0.75 mm, 0.4 mm pitch
- QFN48: 6.0 x 6.0 x 0.75 mm, 0.4 mm pitch
