Block Diagram

The SoC block diagram is shown in the figure below.

• Bluetooth subsystem
  • A 2.4 GHz transceiver and a digital communication core, both supporting Bluetooth LE 5.3
• MCU subsystem
  • An Arm^® Cortex^®-M4F with all the required memories and peripherals
• Power Management Unit (PMU) subsystem
  • Power supply for the whole SoC, including internal modules and external peripherals
  • Efficient and reliable SoC power management
• Clock Generation Unit (CGU) subsystem
  • Providing stable, low-power, and accurate clock signals
  • Optimizing SoC performance and minimizing power consumption, by adjusting clock frequency and selecting an appropriate clock.