Main Features
Each of the GPIO, AON_GPIO, and MSIO pads can be configured to connect to 1 of 8 choices (MUX_0 – MUX_7) of internal signals by programming the DPAD_MUX_SEL_*, AON_PAD_MUX_SEL_*, and MSIO_MUX_SEL_* registers, respectively.
Each of the GPIO, AON_GPIO, and MSIO pads can be configured to connect to 1 of 8 choices (MUX_0 – MUX_7) of internal signals by programming the DPAD_MUX_SEL_*, AON_PAD_MUX_SEL_*, and MSIO_MUX_SEL_* registers, respectively.
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