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文档中心 > GR551x Datasheet/ Peripherals / Dual-Timer/ Registers Copy URL

Registers

LOADx

  • Name: Dual-Timer Load Register
  • Description: This register contains the value from which the counter is to decrease. This is the value used to reload the counter when periodic mode is enabled, and the current count reaches 0.
  • Base Address: 0xA0002000
  • Offset: 0x00 + x*0x20
  • Reset Value: 0x00
表 72 Dual-Timer Load Register
Bits Field Name RW Reset Description
31:0 COUNT RW 0x0 Reload value. Write to this register sets the current value.

VALx

  • Name: Dual-Timer Current Value Register
  • Description: This register provides the current value of the decrementing counter.
  • Base Address: 0xA0002000
  • Offset: 0x04 + x*0x20
  • Reset Value: 0xFFFFFFFF
表 73 Dual-Timer Current Value Register
Bits Field Name RW Reset Description
31:0 COUNT RO 0xFFFFFFFF Current value

CTRLx

  • Name: Dual-Timer Control Register
  • Description: The CTRL register enables the software to control the Dual-Timer unit.
  • Base Address: 0xA0002000
  • Offset: 0x08 + x*0x20
  • Reset Value: 0x20
表 74 Dual-Timer Control Register
Bits Field Name RW Reset Description
31:8 RSVD R Reserved bits
7 EN RW 0x0

Timer enable

Value:

  • 0x0: Timer disabled, default
  • 0x1: Timer enabled
6 MODE RW 0x0

Timer mode

Value:

  • 0x0: Timer is in free-running mode, default
  • 0x1: Timer is in periodic mode.
5 INT_EN RW 0x1

Interrupt enable

Value:

  • 0x0: Timer interrupt disabled
  • 0x1: Timer interrupt enabled, default
4 RSVD R Reserved bits
3:2 PRE RW 0x0

Prescale bits

Value:

  • 0x00: 0 stage of prescale, clock is divided by 1, default.
  • 0x01: 4 stages of prescale, clock is divided by 16.
  • 0x10: 8 stages of prescale, clock is divided by 256.
  • 0x11: Undefined, do not use.
1 SIZE RW 0x0

Select 16-bit or 32-bit counter operation

Value:

  • 0x0: 16-bit counter, default
  • 0x1: 32-bit counter
0 COUNT_MODE RW 0x0

Select Free-running or One-shot mode.

Value:

  • 0x0: Free-running mode, default
  • 0x1: One-shot mode

INT_CLRx

  • Name: Dual-Timer Interrupt Clear Register
  • Description: Any write to the INT_CLRx register clears the interrupt output from the counter.
  • Base Address: 0xA0002000
  • Offset: 0x0C + x*0x20
  • Reset Value:0x00
表 75 Dual-Timer Interrupt Clear Register
Bits Field Name RW Reset Description
31:0 STAT WO 0x0 Clear the Dual-Timer interrupt event.

INT_RSTATx

  • Name: Dual-Timer Raw Interrupt Status Register
  • Description: The INT_RSTATx register indicates the raw interrupt status from the counter.
  • Base Address: 0xA0002000
  • Offset: 0x10 + x*0x20
  • Reset Value:0x00
表 76 Dual-Timer Raw Interrupt Status Register
Bits Field Name RW Reset Description
31:1 RSVD R Reserved bits
0 STAT RW 0x0 Raw interrupt status from the counter

INT_STATx

  • Name: Dual-Timer Interrupt Status Register
  • Description: The INT_STATx register indicates the masked interrupt status from the counter.
  • Base Address: 0xA0002000
  • Offset: 0x14 + x*0x20
  • Reset Value: 0x00
表 77 Dual-Timer Interrupt Status Register
Bits Field Name RW Reset Description
31:1 RSVD R Reserved bits
0 STAT RW 0x0 Enable interrupt status from the counter.

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