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GR551x Datasheet

版本：

Rev.2.6

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文档中心 > GR551x Datasheet/ Peripherals / Timer/ Registers Copy URL

Registers

CTRL

Name: Timer Control Register
Description: The CTRL register enables the software to control the Timer unit.
Base Address: 0xA0000000 + x*0x1000
Offset: 0x0000
Reset Value: 0x00

表 68 Timer Control Register
Bits	Field Name	RW	Reset	Description
31:4	RSVD	R		Reserved bits
3	INT_EN	RW	0x0	Timer interrupt enable Value: 0x0: Disable the timer interrupt 0x1: Enable the timer interrupt
2:1	RSVD	R		Reserved bits
0	EN	RW	0x0	Disable the timer interrupt Value: 0x0: Disable the timer 0x1: Enable the timer

VAL

Name: Timer Value Register
Description: The VAL register indicates the current value of the decrementing counter.
Base Address: 0xA0000000 + x*0x1000
Offset: 0x04
Reset Value: 0x00

表 69 Timer Value Register
Bits	Field Name	RW	Reset	Description
31:0	COUNT	RW	0x0	Current value

RELOAD

Name:Timer Reload Register
Description: When this register is written to, the count is immediately restarted from the new value.
Base Address: 0xA0000000 + x*0x1000
Offset: 0x08
Reset Value: 0x00

表 70 Timer Reload Register
Bits	Field Name	RW	Reset	Description
31:0	COUNT	RW	0x0	Reload value. Write the current value to this register.

INT_STAT

Name: Timer Interrupt Status Register
Description: The INT_STAT register indicates the interrupt status from the counter. Write 1 to this register to clear the timer interrupt flag.
Base Address: 0xA0000000 + x*0x1000
Offset: 0x0C
Reset Value: 0x00000000

表 71 Timer Interrupt Status Register
Bits	Field Name	RW	Reset	Description
31:1	RSVD	R		Reserved bits
0	STAT	RW	0x0	Timer interrupt. Write one to clear.

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