Registers
Timer Control
Sleep Timer is part of the Power State Controller design and therefore it is mainly controlled via Power State Controller commands.
VAL_SET
- Base Address: 0xA000C500
- Offset: 0x90
- Reset Value: 0x00000000
| Bits | Field Name | RW | Reset | Description |
|---|---|---|---|---|
| 31:0 | VAL_SET | RW | 0x0 | This register is shared with multiple timers. To apply the value, set the value then assert corresponding load registers. |
VAL_RD
- Base Address: 0xA000C500
- Offset: 0x94
- Reset Value: 0x00000000
| Bits | Field Name | RW | Reset | Description |
|---|---|---|---|---|
| 31:0 | VAL_RD | R | 0x0 | This register is to read the current value and shared with multiple timers. |
