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文档中心 > GR551x Datasheet/ Always-on Domain/ WDT/ Functional Description Copy URL

Functional Description

Block Diagram

The following figure shows the functional blocks of the Always-on watchdog module.

图 17 Always-on Watchdog Block Diagram

The watchdog starts running when AON_WDT_EN = 1 is synchronized to AON_WDT clock domain, which takes 1 – 3 RNG (Random Number Generators) clock cycles (20 – 100 µs).

If no reload operation is performed, the down counter default value is 0xFFFFFFFF. Otherwise, the counter will be reloaded with the value of timer_value.

Clock

The AON_WDT works in RNG clock (30 kHz – 50 kHz), which is much slower than MCU system clock (16 MHz – 64 MHz). Therefore, synchronization time is needed to propagate the MCU operations. For example, in reload operation, MCU needs to check whether the VAL_RD value has changed as expected.

Enable/Disable and Timer Reload

  • To enable the block, set AON_WDT_EN = 1 and wait until AON_WDT_RUNNING being high.
  • To disable the block, set AON_WDT_EN = 0 and wait until AON_WDT_RUNNING being low.
  • To reload down counter, program the desired value to timer_value, then set write-only register AON_WDT_RELOAD = 1. MCU can check read-only register VAL_RD to confirm.

Alarm

The AON_WDT provides an almost-expired alarm to warn MCU before system reset. By setting ALARM_VAL= N(non-zero), the AON_WDT generates an interrupt N RNG clocks before the system reset.

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