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GR551x Datasheet

版本：

Rev.2.6

V3.0 Rev.2.9 Rev.2.8 Rev.2.7 Rev.2.6 Rev.2.5 Rev.2.4 Rev.2.3 Rev.2.2 Rev.1.9

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文档中心 > GR551x Datasheet/ Always-on Domain/ WDT/ Registers Copy URL

Registers

AON_WDT_CTRL

Base Address: 0xA000C500
Offset: 0x58
Reset Value:0xA0010001

表 24 AON_WDT_CTRL
Bits	Field Name	RW	Reset	Description
31:27	ALARM_VAL	RW	0x14	Alarm values: 0x0: No alarm interrupt. 0x1 – 0x1F: Generate alarm interrupt N RNG clocks before it expires.
26	AON_WDT_RUNNING	R	0x0	Value: 0x0: The AON_WDT is not running. 0x1: The AON_WDT is running.
25	AON_WDT_RELOAD	W	0x0	Load the value in timer_value to the AON_WDT down counter.
24	AON_WDT_EN	RW	0x0	Value: 0x0:Disable the AON_WDT. 0x1:Enable the AON_WDT.
23:16	*EXTERNAL_WAKEUP_TYPE	RW	0x1	Value: 0x0: pulse 0x1: level
15:8	*INVERT_EXTERNAL_WAKEUP	RW	0x0	Value: 0x0: none 0x1: invert external wakeup
7:0	*SRC_EN	RW	0x1	Enable external wakeup source. [0]: AONGPIO0 [1]: AONGPIO1 [2]: AONGPIO2 [3]: AONGPIO3 [4]: AONGPIO4 [5]: AONGPIO5 [6]: AONGPIO6 [7]: AONGPIO7 Value: 0x0: Disable external wakeup source. 0x1: Enable external wakeup source.

Note:

AON_WDT_CTRL does not support fields marked with an asterisk (*).

VAL_SET

Base Address: 0xA000C500
Offset: 0x90
Reset Value: 0x00000000

表 32 VAL_SET
Bits	Field Name	RW	Reset	Description
31:0	VAL_SET	RW	0x0	This register is shared with multiple timers. To apply the value, set the value then assert corresponding load registers.

VAL_RD

Base Address: 0xA000C500
Offset: 0x94
Reset Value: 0x00000000

表 33 VAL_RD
Bits	Field Name	RW	Reset	Description
31:0	VAL_RD	R	0x0	This register is to read the current value and shared with multiple timers.

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