GR5515RGBD BGA68
Figure 4 shows the pin assignments of GR5515RGBD BGA68 package (top view).
Table 4 shows pin descriptions of GR5515RGBD BGA68 package.
| Pin # | Pin Name | Pin Type | Description/Default Function | Voltage Domain |
|---|---|---|---|---|
| A1 | VDD_VCO | Analog/RF supply | Synthesizer VCO supply: 1.1 V; connect to VREG | |
| A2 | TPP | Analog/RF | Test Mux +output | |
| A3 | XO_IN | Analog/RF | Input of inverting amplifier connected to 32 MHz crystal | |
| A4 | XO_OUT | Analog/RF | Output of inverting amplifier connected to 32 MHz crystal | |
| A5 | VDD_AMS | Analog/RF | AMS supply 1.1 V; connect to VREG | |
| A6 | GPIO28 | Digital I/O | General purpose I/O; pad drive level is 2 mA. | VDDIO0 |
| A7 | GPIO27 | Digital I/O | General purpose I/O; pad drive level is 2 mA. | VDDIO0 |
| A8 | GPIO26 | Digital I/O | General purpose I/O; pad drive level is 2 mA. | VDDIO0 |
| A9 | GPIO30 | Digital I/O | General purpose I/O; pad drive level is 2 mA. | VDDIO0 |
| A10 | GPIO17 | Digital I/O | General purpose I/O; pad drive level is 2 mA. | VDDIO0 |
| B1 | VDD_RF | Analog/RF | RF supply: 1.1 V; connect to VREG | |
| B2 | TPN | Analog/RF | Test Mux - output | |
| B9 | GPIO13 | Digital I/O | General purpose I/O; pad drive level is 2 mA. | VDDIO1 |
| B10 | GPIO24 | Digital I/O | General purpose I/O; pad drive level is 2 mA. | VDDIO0 |
| C1 | RF_GND | Analog/RF | RF ground | |
| C3 | RF_GND | Analog/RF | RF ground | |
| C4 | GPIO0 | Digital I/O | General purpose I/O; default: SWD_CLK; pad drive level is 2 mA. | VDDIO1 |
| C5 | GPIO29 | Digital I/O | General purpose I/O; pad drive level is 2 mA. | VDDIO0 |
| C6 | GPIO31 | Digital I/O | General purpose I/O; pad drive level is 2 mA. | VDDIO0 |
| C7 | GPIO25 | Digital I/O | General purpose I/O; pad drive level is 2 mA. | VDDIO0 |
| C8 | GPIO16 | Digital I/O | General purpose I/O; pad drive level is 2 mA. | VDDIO0 |
| C10 | GPIO14 | Digital I/O | General purpose I/O; pad drive level is 2 mA. | VDDIO1 |
| D1 | TRX | Analog/RF | RX input and TX output | |
| D3 | RF_GND | Analog/RF | RF ground | |
| D8 | NC | - | - | |
| D9 | AON_GPIO6 | Digital I/O | Always-on GPIO; pad drive level is 2 mA. | VDDIO0 |
| D10 | GPIO15 | Digital I/O | General purpose I/O; pad drive level is 2 mA. | VDDIO1 |
| E1 | VBATT_RF | Analog/RF | Connect to VBATL | |
| E3 | GPIO1 | Digital I/O | General purpose I/O; default: SWD_IO; pad drive level is 2 mA. | VDDIO1 |
| E5 | DGND | Digital GND | Digital Ground | |
| E6 | DGND | Digital GND | Digital Ground | |
| E8 | AON_GPIO1 | Digital I/O | Always-on GPIO; pad drive level is 2 mA. | VDDIO0 |
| E9 | AON_GPIO7 | Digital I/O | Always-on GPIO; pad drive level is 2 mA. | VDDIO0 |
| E10 | GPIO9 | Digital I/O | General purpose I/O; pad drive level is 2 mA. | VDDIO1 |
| F1 | GPIO4 | Digital I/O | General purpose I/O; pad drive level is 2 mA. | VDDIO1 |
| F3 | GPIO2 | Digital I/O | General purpose I/O; pad drive level is 2 mA. | VDDIO1 |
| F5 | VDDIO_1 | Digital Supply | I/O supply voltage. Support external 1.8 V–3.3 V input voltage. |
VDDIO1 |
| F6 | TEST_MODE | Digital I/O | Factory test mode selection pin
|
VDDIO0 |
| F8 | AON_GPIO0 | Digital I/O | Always-on GPIO; pad drive level is 2 mA. | VDDIO0 |
| F9 | GPIO8 | Digital I/O | General purpose I/O; pad drive level is 2 mA. | VDDIO1 |
| F10 | GPIO12 | Digital I/O | General purpose I/O; pad drive level is 2 mA. | VDDIO1 |
| G1 | GPIO5 | Digital I/O | General purpose I/O; pad drive level is 2 mA. | VDDIO1 |
| G3 | GPIO6 | Digital I/O | General purpose I/O; pad drive level is 2 mA. | VDDIO1 |
| G8 | MSIO4 | Mixed Signal I/O | Configurable to be a GPIO mixed signal (SNSADC interface); pad drive level is 2 mA. | VBATL |
| G10 | AON_GPIO5 | Digital I/O | Always-on GPIO; pad drive level is 2 mA. | VDDIO0 |
| H1 | VDD_CORE | Digital Supply | Digital core supply | |
| H3 | GPIO11 | Digital I/O | General purpose I/O; pad drive level is 2 mA. | VDDIO1 |
| H4 | CHIP_EN | Mixed Signal IN | Master Enable for chip reset pin. The high value of CHIP_EN equals VBATL. |
|
| H5 | VBATH_LDO_WBE | Analog/PMU | Connect to GND. | |
| H6 | PMUGND | Analog/PMU | DC-DC converter supply & general battery GND | |
| H7 | MSIO3 | Mixed Signal I/O | Configurable to be a GPIO mixed signal (SNSADC interface); pad drive level is 2 mA. | VBATL |
| H8 | MSIO2 | Mixed Signal I/O | Configurable to be a GPIO mixed signal (SNSADC interface); pad drive level is 2 mA. | VBATL |
| H10 | AON_GPIO4 | Digital I/O | Always-on GPIO; pad drive level is 2 mA. | VDDIO0 |
| J1 | GPIO7 | Digital I/O | General purpose I/O; pad drive level is 2 mA. | VDDIO1 |
| J2 | GPIO10 | Digital I/O | General purpose I/O; pad drive level is 2 mA. | VDDIO1 |
| J4 | VIO_LDO_OUT | Analog/PMU | Output of On-Chip I/O supply regulator. | Connected internally to VDDIO0 |
| J9 | MSIO0 | Mixed Signal I/O | Configurable to be a GPIO mixed signal (SNSADC interface); pad drive level is 2 mA. | VBATL |
| J10 | AON_GPIO3 | Digital I/O | Always-on GPIO; pad drive level is 2 mA. | VDDIO0 |
| K1 | GPIO3 | Digital I/O | General purpose I/O; pad drive level is 2 mA. | VDDIO1 |
| K2 | VDD_DIGCORE_1V | Analog/PMU | On-chip LDO output for digital core, connected to 1 µF capacitor | |
| K3 | VREG | Analog/PMU | Feedback pin of switch regulator | |
| K4 | VBATH | Analog/PMU | Connect to VBATL | |
| K5 | VSW | Analog/PMU | DC-DC Converter Switching Node | |
| K6 | VBATL | Analog/PMU | Power supply: 2.2 V to 3.8 V | |
| K7 | MSIO1 | Mixed Signal I/O | Configurable to be a GPIO mixed signal (SNSADC interface); pad drive level is 2 mA. | VBATL |
| K8 | RTC_IN | Analog/PMU | Input of inverting amplifier connected to 32.768 kHz crystal | |
| K9 | RTC_OUT | Analog/PMU | Output of inverting amplifier connected to 32.768 kHz crystal | |
| K10 | AON_GPIO2 | Digital I/O | Always-on GPIO; pad drive level is 2 mA. | VDDIO0 |
