◆ IS_DMA_ALL_INSTANCE
#define IS_DMA_ALL_INSTANCE |
( |
|
__instance__ | ) |
|
Value:
Check if DMA channel instance is valid.
- Parameters
-
<strong>instance</strong> | DMA channel instance. |
- Return values
-
SET | (instance is valid) or RESET (instance is invalid) |
◆ IS_DMA_ALL_REQUEST
#define IS_DMA_ALL_REQUEST |
( |
|
__REQUEST__ | ) |
|
Value:
Check if DMA request is valid.
- Parameters
-
<strong>REQUEST</strong> | DMA request. |
- Return values
-
SET | (REQUEST is valid) or RESET (REQUEST is invalid) |
◆ IS_DMA_BUFFER_SIZE
#define IS_DMA_BUFFER_SIZE |
( |
|
__SIZE__ | ) |
(((__SIZE__) >= 0x1) && ((__SIZE__) < 0xFFF)) |
Check if DMA buffer size is valid.
- Parameters
-
<strong>SIZE</strong> | DMA buffer size. |
- Return values
-
SET | (SIZE is valid) or RESET (SIZE is invalid) |
◆ IS_DMA_DESTINATION_DATA_SIZE
#define IS_DMA_DESTINATION_DATA_SIZE |
( |
|
__SIZE__ | ) |
|
Value:
Check if DMA destination data size is valid.
- Parameters
-
<strong>SIZE</strong> | DMA destination data size. |
- Return values
-
SET | (SIZE is valid) or RESET (SIZE is invalid) |
◆ IS_DMA_DESTINATION_INC_STATE
#define IS_DMA_DESTINATION_INC_STATE |
( |
|
__STATE__ | ) |
|
Value:
Check if DMA destination address increment state is valid.
- Parameters
-
<strong>STATE</strong> | DMA destination address increment state. |
- Return values
-
SET | (STATE is valid) or RESET (STATE is invalid) |
◆ IS_DMA_DIRECTION
#define IS_DMA_DIRECTION |
( |
|
__DIRECTION__ | ) |
|
Value:
Check if DMA direction is valid.
- Parameters
-
<strong>DIRECTION</strong> | DMA direction. |
- Return values
-
SET | (DIRECTION is valid) or RESET (DIRECTION is invalid) |
◆ IS_DMA_MODE
#define IS_DMA_MODE |
( |
|
__MODE__ | ) |
|
Value:
Check if DMA mode is valid.
- Parameters
-
<strong>MODE</strong> | DMA mode. |
- Return values
-
SET | (MODE is valid) or RESET (MODE is invalid) |
◆ IS_DMA_PRIORITY
#define IS_DMA_PRIORITY |
( |
|
__PRIORITY__ | ) |
|
Value:
Check if DMA priority is valid.
- Parameters
-
<strong>PRIORITY</strong> | DMA priority. |
- Return values
-
SET | (PRIORITY is valid) or RESET (PRIORITY is invalid) |
◆ IS_DMA_SOURCE_DATA_SIZE
#define IS_DMA_SOURCE_DATA_SIZE |
( |
|
__SIZE__ | ) |
|
Value:
Check if DMA source data size is valid.
- Parameters
-
<strong>SIZE</strong> | DMA source data size. |
- Return values
-
SET | (SIZE is valid) or RESET (SIZE is invalid) |
◆ IS_DMA_SOURCE_INC_STATE
#define IS_DMA_SOURCE_INC_STATE |
( |
|
__STATE__ | ) |
|
Value:
Check if DMA source address increment state is valid.
- Parameters
-
<strong>STATE</strong> | DMA source address increment state. |
- Return values
-
SET | (STATE is valid) or RESET (STATE is invalid) |
@ DMA_Channel4
Definition: gr55xx_hal_dma.h:98
#define DMA_PRIORITY_MEDIUM
Definition: gr55xx_hal_dma.h:305
#define DMA_REQUEST_SNSADC
Definition: gr55xx_hal_dma.h:248
#define DMA_SDATAALIGN_HALFWORD
Definition: gr55xx_hal_dma.h:281
#define DMA_REQUEST_SPIM_TX
Definition: gr55xx_hal_dma.h:230
@ DMA_Channel1
Definition: gr55xx_hal_dma.h:95
#define DMA_REQUEST_QSPI0_TX
Definition: gr55xx_hal_dma.h:234
#define DMA_REQUEST_QSPI1_TX
Definition: gr55xx_hal_dma.h:244
@ DMA_Channel0
Definition: gr55xx_hal_dma.h:94
#define DMA_REQUEST_SPIM_RX
Definition: gr55xx_hal_dma.h:231
#define DMA_REQUEST_I2C1_RX
Definition: gr55xx_hal_dma.h:239
#define DMA_REQUEST_I2C0_TX
Definition: gr55xx_hal_dma.h:236
#define DMA_SRC_NO_CHANGE
Definition: gr55xx_hal_dma.h:266
#define DMA_PRIORITY_VERY_HIGH
Definition: gr55xx_hal_dma.h:307
#define DMA_REQUEST_MEM
Definition: gr55xx_hal_dma.h:249
#define DMA_SRC_DECREMENT
Definition: gr55xx_hal_dma.h:265
#define DMA_DDATAALIGN_WORD
Definition: gr55xx_hal_dma.h:290
@ DMA_Channel5
Definition: gr55xx_hal_dma.h:99
#define DMA_REQUEST_QSPI0_RX
Definition: gr55xx_hal_dma.h:235
#define DMA_REQUEST_I2S_M_TX
Definition: gr55xx_hal_dma.h:246
#define DMA_DDATAALIGN_BYTE
Definition: gr55xx_hal_dma.h:288
#define DMA_REQUEST_UART0_RX
Definition: gr55xx_hal_dma.h:243
@ DMA_Channel2
Definition: gr55xx_hal_dma.h:96
#define DMA_REQUEST_UART0_TX
Definition: gr55xx_hal_dma.h:242
#define DMA_PERIPH_TO_PERIPH
Definition: gr55xx_hal_dma.h:258
#define DMA_REQUEST_I2S_S_TX
Definition: gr55xx_hal_dma.h:240
#define DMA_REQUEST_I2C1_TX
Definition: gr55xx_hal_dma.h:238
#define DMA_PRIORITY_HIGH
Definition: gr55xx_hal_dma.h:306
#define DMA_REQUEST_SPIS_TX
Definition: gr55xx_hal_dma.h:232
#define DMA_SRC_INCREMENT
Definition: gr55xx_hal_dma.h:264
#define DMA_SDATAALIGN_BYTE
Definition: gr55xx_hal_dma.h:280
#define DMA_DST_NO_CHANGE
Definition: gr55xx_hal_dma.h:274
#define DMA_CIRCULAR
Definition: gr55xx_hal_dma.h:297
#define DMA_REQUEST_SPIS_RX
Definition: gr55xx_hal_dma.h:233
@ DMA_Channel6
Definition: gr55xx_hal_dma.h:100
#define DMA_MEMORY_TO_MEMORY
Definition: gr55xx_hal_dma.h:255
#define DMA_DST_DECREMENT
Definition: gr55xx_hal_dma.h:273
#define DMA_SDATAALIGN_WORD
Definition: gr55xx_hal_dma.h:282
@ DMA_Channel3
Definition: gr55xx_hal_dma.h:97
@ DMA_Channel7
Definition: gr55xx_hal_dma.h:101
#define DMA_PERIPH_TO_MEMORY
Definition: gr55xx_hal_dma.h:257
#define DMA_PRIORITY_LOW
Definition: gr55xx_hal_dma.h:304
#define DMA_REQUEST_I2S_S_RX
Definition: gr55xx_hal_dma.h:241
#define DMA_REQUEST_QSPI1_RX
Definition: gr55xx_hal_dma.h:245
#define DMA_NORMAL
Definition: gr55xx_hal_dma.h:296
#define DMA_REQUEST_I2S_M_RX
Definition: gr55xx_hal_dma.h:247
#define DMA_REQUEST_I2C0_RX
Definition: gr55xx_hal_dma.h:237
#define DMA_MEMORY_TO_PERIPH
Definition: gr55xx_hal_dma.h:256
#define DMA_DST_INCREMENT
Definition: gr55xx_hal_dma.h:272
#define DMA_DDATAALIGN_HALFWORD
Definition: gr55xx_hal_dma.h:289