Cache driver functions

Functions
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_enable_cache (xqspi_regs_t *XQSPIx)
	Enable cache function. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_disable_cache (xqspi_regs_t *XQSPIx)
	Disable cache function. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_is_enabled_cache (xqspi_regs_t *XQSPIx)
	Check if cache function is enabled. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_enable_cache_flush (xqspi_regs_t *XQSPIx)
	Enable tag memory flush. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_disable_cache_flush (xqspi_regs_t *XQSPIx)
	Disable tag memory flush. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_is_enabled_cache_flush (xqspi_regs_t *XQSPIx)
	Check if tag memory flush is enabled. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_set_cache_fifo (xqspi_regs_t *XQSPIx, uint32_t mode)
	Set FIFO mode. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_cache_fifo (xqspi_regs_t *XQSPIx)
	Get FIFO mode. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_set_cache_hitmiss (xqspi_regs_t *XQSPIx, uint32_t mode)
	Set HIT/MISS mode. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_cache_hitmiss (xqspi_regs_t *XQSPIx)
	Get HIT/MISS mode. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_set_cache_dbgbus (xqspi_regs_t *XQSPIx, uint32_t sel)
	Set debugbus configurations signals. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_cache_dbgbus (xqspi_regs_t *XQSPIx)
	Get debugbus configurations signals. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_enable_cache_dbgmux (xqspi_regs_t *XQSPIx)
	Enable debug bus mux. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_disable_cache_dbgmux (xqspi_regs_t *XQSPIx)
	Disable debug bus mux. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_is_enabled_cache_dbgmux (xqspi_regs_t *XQSPIx)
	Check if debug bus mux is enabled. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_cache_hitcount (xqspi_regs_t *XQSPIx)
	Get hit counter. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_cache_misscount (xqspi_regs_t *XQSPIx)
	Get miss counter. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_cache_flag (xqspi_regs_t *XQSPIx)
	Get cache status. More...

Detailed Description

Function Documentation

ll_xqspi_disable_cache()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_cache

(

xqspi_regs_t *

XQSPIx

)

Disable cache function.

Note

This bit should not be changed when XIP is ongoing.

Register	BitsName
CTRL0	EN

Parameters

XQSPIx

XQSPI instance

Return values

None

ll_xqspi_disable_cache_dbgmux()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_cache_dbgmux

(

xqspi_regs_t *

XQSPIx

)

Disable debug bus mux.

Note

This bit should not be changed when XIP is ongoing.

Register	BitsName
CTRL1	DBGMUX_EN

Parameters

XQSPIx

XQSPI instance

Return values

None

ll_xqspi_disable_cache_flush()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_disable_cache_flush

(

xqspi_regs_t *

XQSPIx

)

Disable tag memory flush.

Note

This bit should not be changed when XIP is ongoing.

Register	BitsName
CTRL0	TAG

Parameters

XQSPIx

XQSPI instance

Return values

None

ll_xqspi_enable_cache()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_cache

(

xqspi_regs_t *

XQSPIx

)

Enable cache function.

Note

This bit should not be changed when XIP is ongoing.

Register	BitsName
CTRL0	EN

Parameters

XQSPIx

XQSPI instance

Return values

None

ll_xqspi_enable_cache_dbgmux()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_cache_dbgmux

(

xqspi_regs_t *

XQSPIx

)

Enable debug bus mux.

Note

This bit should not be changed when XIP is ongoing.

Register	BitsName
CTRL1	DBGMUX_EN

Parameters

XQSPIx

XQSPI instance

Return values

None

ll_xqspi_enable_cache_flush()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_enable_cache_flush

(

xqspi_regs_t *

XQSPIx

)

Enable tag memory flush.

Note

This bit should not be changed when XIP is ongoing.

Register	BitsName
CTRL0	TAG

Parameters

XQSPIx

XQSPI instance

Return values

None

ll_xqspi_get_cache_dbgbus()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_cache_dbgbus

(

xqspi_regs_t *

XQSPIx

)

Get debugbus configurations signals.

Register	BitsName
CTRL1	DBGBUS_SEL

Parameters

XQSPIx

XQSPI instance

Return values

Returned

Value can between: 0 ~ 0x7

ll_xqspi_get_cache_fifo()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_cache_fifo

(

xqspi_regs_t *

XQSPIx

)

Get FIFO mode.

Note

This bit should not be changed when XIP is ongoing.

Register	BitsName
CTRL0	FIFO

Parameters

XQSPIx

XQSPI instance

Return values

Returned

Value can be one of the following values: LL_XQSPI_CACHE_FIFO_NORMAL LL_XQSPI_CACHE_FIFO_CLEAR

ll_xqspi_get_cache_flag()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_cache_flag

(

xqspi_regs_t *

XQSPIx

)

Get cache status.

Note

This bit only be read.

Register	BitsName
STAT	STAT

Parameters

XQSPIx

XQSPI instance

Return values

Returned

Value can between: 0 ~ 1

ll_xqspi_get_cache_hitcount()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_cache_hitcount

(

xqspi_regs_t *

XQSPIx

)

Get hit counter.

Note

This bit only be read.

Register	BitsName
HIT_COUNT	HITCOUNT

Parameters

XQSPIx

XQSPI instance

Return values

Returned

Value can between: 0 ~ 0xFFFFFFFF

ll_xqspi_get_cache_hitmiss()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_cache_hitmiss

(

xqspi_regs_t *

XQSPIx

)

Get HIT/MISS mode.

Note

This bit should not be changed when XIP is ongoing.

Register	BitsName
CTRL0	HITMISS

Parameters

XQSPIx

XQSPI instance

Return values

Returned

Value can be one of the following values: LL_XQSPI_CACHE_HITMISS_NORMAL LL_XQSPI_CACHE_HITMISS_CLEAR

ll_xqspi_get_cache_misscount()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_get_cache_misscount

(

xqspi_regs_t *

XQSPIx

)

Get miss counter.

Note

This bit only be read.

Register	BitsName
MISS_COUNT	MISSCOUNT

Parameters

XQSPIx

XQSPI instance

Return values

Returned

Value can between: 0 ~ 0xFFFFFFFF

ll_xqspi_is_enabled_cache()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_cache

(

xqspi_regs_t *

XQSPIx

)

Check if cache function is enabled.

Register	BitsName
CTRL0	EN

Parameters

XQSPIx

XQSPI instance

Return values

State

of bit (1 or 0).

ll_xqspi_is_enabled_cache_dbgmux()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_cache_dbgmux

(

xqspi_regs_t *

XQSPIx

)

Check if debug bus mux is enabled.

Register	BitsName
CTRL1	DBGMUX_EN

Parameters

XQSPIx

XQSPI instance

Return values

State

of bit (1 or 0).

ll_xqspi_is_enabled_cache_flush()

SECTION_RAM_CODE __STATIC_INLINE uint32_t ll_xqspi_is_enabled_cache_flush

(

xqspi_regs_t *

XQSPIx

)

Check if tag memory flush is enabled.

Register	BitsName
CTRL0	TAG

Parameters

XQSPIx

XQSPI instance

Return values

State

of bit (1 or 0).

ll_xqspi_set_cache_dbgbus()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_cache_dbgbus	(	xqspi_regs_t *	XQSPIx,
		uint32_t	sel
	)

Set debugbus configurations signals.

Note

These bits should not be changed when XIP is ongoing.

Register	BitsName
CTRL1	DBGBUS_SEL

Parameters

XQSPIx	XQSPI instance
sel	This parameter can between: 0 ~ 0x7

Return values

None

ll_xqspi_set_cache_fifo()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_cache_fifo	(	xqspi_regs_t *	XQSPIx,
		uint32_t	mode
	)

Set FIFO mode.

Note

This bit should not be changed when XIP is ongoing.

Register	BitsName
CTRL0	FIFO

Parameters

XQSPIx	XQSPI instance
mode	This parameter can be one of the following values: LL_XQSPI_CACHE_FIFO_NORMAL LL_XQSPI_CACHE_FIFO_CLEAR

Return values

None

ll_xqspi_set_cache_hitmiss()

SECTION_RAM_CODE __STATIC_INLINE void ll_xqspi_set_cache_hitmiss	(	xqspi_regs_t *	XQSPIx,
		uint32_t	mode
	)

Set HIT/MISS mode.

Note

This bit should not be changed when XIP is ongoing.

Register	BitsName
CTRL0	HITMISS

Parameters

XQSPIx	XQSPI instance
mode	This parameter can be one of the following values: LL_XQSPI_CACHE_HITMISS_NORMAL LL_XQSPI_CACHE_HITMISS_CLEAR

Return values

None