Configuration functions

Functions
__STATIC_INLINE void	ll_dma_enable (dma_regs_t *DMAx)
	Enable DMA Module. More...
__STATIC_INLINE void	ll_dma_disable (dma_regs_t *DMAx)
	Disable DMA Module. More...
__STATIC_INLINE uint32_t	ll_dma_is_enable (dma_regs_t *DMAx)
	Check if DMA Module is enabled or disabled. More...
__STATIC_INLINE void	ll_dma_enable_channel (dma_regs_t *DMAx, uint32_t channel)
	Enable DMA channel. More...
__STATIC_INLINE void	ll_dma_disable_channel (dma_regs_t *DMAx, uint32_t channel)
	Disable DMA channel. More...
__STATIC_INLINE uint32_t	ll_dma_is_enabled_channel (dma_regs_t *DMAx, uint32_t channel)
	Check if DMA channel is enabled or disabled. More...
__STATIC_INLINE void	ll_dma_suspend_channel (dma_regs_t *DMAx, uint32_t channel)
	Suspend a DMA channel transfer. More...
__STATIC_INLINE void	ll_dma_resume_channel (dma_regs_t *DMAx, uint32_t channel)
	Resume a DMA channel. More...
__STATIC_INLINE uint32_t	ll_dma_is_suspended (dma_regs_t *DMAx, uint32_t channel)
	Check if DMA channel is suspended or resumed. More...
__STATIC_INLINE uint32_t	ll_dma_is_empty_fifo (dma_regs_t *DMAx, uint32_t channel)
	Check if DMA channel FIFO is empty. More...
__STATIC_INLINE void	ll_dma_config_transfer (dma_regs_t *DMAx, uint32_t channel, uint32_t configuration)
	Configure all parameters link to DMA transfer. More...
__STATIC_INLINE void	ll_dma_set_data_transfer_direction (dma_regs_t *DMAx, uint32_t channel, uint32_t direction)
	Set Data transfer direction (read from peripheral or from memory). More...
__STATIC_INLINE uint32_t	ll_dma_get_data_transfer_direction (dma_regs_t *DMAx, uint32_t channel)
	Get Data transfer direction (read from peripheral or from memory). More...
__STATIC_INLINE void	ll_dma_set_mode (dma_regs_t *DMAx, uint32_t channel, uint32_t mode)
	Set DMA mode Single block or Multi block. More...
__STATIC_INLINE uint32_t	ll_dma_get_mode (dma_regs_t *DMAx, uint32_t channel)
	Get DMA mode circular or normal. More...
__STATIC_INLINE void	ll_dma_set_source_increment_mode (dma_regs_t *DMAx, uint32_t channel, uint32_t src_increment_mode)
	Set Source increment mode. More...
__STATIC_INLINE uint32_t	ll_dma_get_source_increment_mode (dma_regs_t *DMAx, uint32_t channel)
	Get Source increment mode. More...
__STATIC_INLINE void	ll_dma_set_destination_increment_mode (dma_regs_t *DMAx, uint32_t channel, uint32_t dst_increment_mode)
	Set Destination increment mode. More...
__STATIC_INLINE uint32_t	ll_dma_get_destination_increment_mode (dma_regs_t *DMAx, uint32_t channel)
	Get Destination increment mode. More...
__STATIC_INLINE void	ll_dma_set_source_width (dma_regs_t *DMAx, uint32_t channel, uint32_t src_width)
	Set Source transfer width. More...
__STATIC_INLINE uint32_t	ll_dma_get_source_width (dma_regs_t *DMAx, uint32_t channel)
	Get Source transfer width. More...
__STATIC_INLINE void	ll_dma_set_destination_width (dma_regs_t *DMAx, uint32_t channel, uint32_t dst_width)
	Set Destination transfer width. More...
__STATIC_INLINE uint32_t	ll_dma_get_destination_width (dma_regs_t *DMAx, uint32_t channel)
	Get Destination transfer width. More...
__STATIC_INLINE void	ll_dma_set_source_burst_length (dma_regs_t *DMAx, uint32_t channel, uint32_t burst_length)
	Set Source Burst Transaction Length. More...
__STATIC_INLINE uint32_t	ll_dma_get_source_burst_length (dma_regs_t *DMAx, uint32_t channel)
	Get Burst Transaction Length. More...
__STATIC_INLINE void	ll_dma_set_destination_burst_length (dma_regs_t *DMAx, uint32_t channel, uint32_t burst_length)
	Set Destination Burst Transaction Length. More...
__STATIC_INLINE uint32_t	ll_dma_get_destination_burst_length (dma_regs_t *DMAx, uint32_t channel)
	Get Destination Burst Transaction Length. More...
__STATIC_INLINE void	ll_dma_set_channel_priority_level (dma_regs_t *DMAx, uint32_t channel, uint32_t priority)
	Set Channel priority level. More...
__STATIC_INLINE uint32_t	ll_dma_get_channel_priority_level (dma_regs_t *DMAx, uint32_t channel)
	Get Channel priority level. More...
__STATIC_INLINE void	ll_dma_set_block_size (dma_regs_t *DMAx, uint32_t channel, uint32_t block_size)
	Set the block size of a transfer. More...
__STATIC_INLINE uint32_t	ll_dma_get_block_size (dma_regs_t *DMAx, uint32_t channel)
	Get the block size of a transfer. More...
__STATIC_INLINE void	ll_dma_config_address (dma_regs_t *DMAx, uint32_t channel, uint32_t src_address, uint32_t dst_address, uint32_t direction)
	Configure the Source and Destination addresses. More...
__STATIC_INLINE void	ll_dma_set_source_address (dma_regs_t *DMAx, uint32_t channel, uint32_t address)
	Set the Source address. More...
__STATIC_INLINE void	ll_dma_set_destination_address (dma_regs_t *DMAx, uint32_t channel, uint32_t address)
	Set the Destination address. More...
__STATIC_INLINE uint32_t	ll_dma_get_source_address (dma_regs_t *DMAx, uint32_t channel)
	Get Source address. More...
__STATIC_INLINE uint32_t	ll_dma_get_destination_address (dma_regs_t *DMAx, uint32_t channel)
	Get Destination address. More...
__STATIC_INLINE void	ll_dma_set_m2m_src_address (dma_regs_t *DMAx, uint32_t channel, uint32_t address)
	Set the Memory to Memory Source address. More...
__STATIC_INLINE void	ll_dma_set_m2m_dst_address (dma_regs_t *DMAx, uint32_t channel, uint32_t address)
	Set the Memory to Memory Destination address. More...
__STATIC_INLINE uint32_t	ll_dma_get_m2m_src_address (dma_regs_t *DMAx, uint32_t channel)
	Get the Memory to Memory Source address. More...
__STATIC_INLINE uint32_t	ll_dma_get_m2m_dst_address (dma_regs_t *DMAx, uint32_t channel)
	Get the Memory to Memory Destination address. More...
__STATIC_INLINE void	ll_dma_set_source_peripheral (dma_regs_t *DMAx, uint32_t channel, uint32_t peripheral)
	Set source peripheral for DMA instance on Channel x. More...
__STATIC_INLINE uint32_t	ll_dma_get_source_peripheral (dma_regs_t *DMAx, uint32_t channel)
	Get source peripheral for DMA instance on Channel x. More...
__STATIC_INLINE void	ll_dma_set_destination_peripheral (dma_regs_t *DMAx, uint32_t channel, uint32_t peripheral)
	Set destination peripheral for DMA instance on Channel x. More...
__STATIC_INLINE uint32_t	ll_dma_get_destination_peripheral (dma_regs_t *DMAx, uint32_t channel)
	Get destination peripheral for DMA instance on Channel x. More...
__STATIC_INLINE void	ll_dma_select_handshaking (dma_regs_t *DMAx, uint32_t channel, uint32_t src_handshaking, uint32_t dst_handshaking)
	Set source and destination source handshaking interface. More...
__STATIC_INLINE void	ll_dma_req_src_single_transaction (dma_regs_t *DMAx, uint32_t channel)
	Source Single Transaction Request. More...
__STATIC_INLINE void	ll_dma_req_src_burst_transaction (dma_regs_t *DMAx, uint32_t channel)
	Source Burst Transaction Request. More...
__STATIC_INLINE void	ll_dma_req_src_last_single_transaction (dma_regs_t *DMAx, uint32_t channel)
	Source Last Single Transaction Request. More...
__STATIC_INLINE void	ll_dma_req_src_last_burst_transaction (dma_regs_t *DMAx, uint32_t channel)
	Source Last Burst Transaction Request. More...
__STATIC_INLINE void	ll_dma_req_dst_single_transaction (dma_regs_t *DMAx, uint32_t channel)
	Destination Single Transaction Request. More...
__STATIC_INLINE void	ll_dma_req_dst_burst_transaction (dma_regs_t *DMAx, uint32_t channel)
	Destination Burst Transaction Request. More...
__STATIC_INLINE void	ll_dma_req_dst_last_single_transaction (dma_regs_t *DMAx, uint32_t channel)
	Destination Last Single Transaction Request. More...
__STATIC_INLINE void	ll_dma_req_dst_last_burst_transaction (dma_regs_t *DMAx, uint32_t channel)
	Destination Last Burst Transaction Request. More...

Detailed Description

Function Documentation

ll_dma_config_address()

__STATIC_INLINE void ll_dma_config_address	(	dma_regs_t *	DMAx,
		uint32_t	channel,
		uint32_t	src_address,
		uint32_t	dst_address,
		uint32_t	direction
	)

Configure the Source and Destination addresses.

Note

Each IP using DMA provides an API to get directly the register adress (LL_PPP_DMA_GetRegAddr)

Register	BitsName
SAR	SAR
DAR	DAR
CTL_LO	TT_FC

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7
src_address	Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
dst_address	Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
direction	This parameter can be one of the following values: LL_DMA_DIRECTION_MEMORY_TO_MEMORY LL_DMA_DIRECTION_MEMORY_TO_PERIPH LL_DMA_DIRECTION_PERIPH_TO_MEMORY LL_DMA_DIRECTION_PERIPH_TO_PERIPH

Return values

None

ll_dma_config_transfer()

__STATIC_INLINE void ll_dma_config_transfer	(	dma_regs_t *	DMAx,
		uint32_t	channel,
		uint32_t	configuration
	)

Configure all parameters link to DMA transfer.

Register	BitsName
CCR	DIR
CCR	MEM2MEM
CCR	CIRC
CCR	PINC
CCR	MINC
CCR	PSIZE
CCR	MSIZE
CCR	PL

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7
configuration	This parameter must be a combination of all the following values: LL_DMA_MODE_SINGLE_BLOCK or LL_DMA_MODE_MULTI_BLOCK_SRC_RELOAD or LL_DMA_MODE_MULTI_BLOCK_DST_RELOAD or LL_DMA_MODE_MULTI_BLOCK_ALL_RELOAD LL_DMA_SRC_INCREMENT or LL_DMA_SRC_DECREMENT or LL_DMA_SRC_NO_CHANGE LL_DMA_DST_INCREMENT or LL_DMA_DST_DECREMENT or LL_DMA_DST_NO_CHANGE LL_DMA_SDATAALIGN_BYTE or LL_DMA_SDATAALIGN_HALFWORD or LL_DMA_SDATAALIGN_WORD LL_DMA_DDATAALIGN_BYTE or LL_DMA_DDATAALIGN_HALFWORD or LL_DMA_DDATAALIGN_WORD LL_DMA_SRC_BURST_LENGTH_1 or LL_DMA_SRC_BURST_LENGTH_4 or LL_DMA_SRC_BURST_LENGTH_8 LL_DMA_DST_BURST_LENGTH_1 or LL_DMA_DST_BURST_LENGTH_4 or LL_DMA_DST_BURST_LENGTH_8

Return values

None

ll_dma_disable()

__STATIC_INLINE void ll_dma_disable

(

dma_regs_t *

DMAx

)

Disable DMA Module.

Note

If the ll_dma_disable() function is called while any dma channel is still active, the ll_dma_is_enable() function still return 1 to indicate that there are channels still active until hardware has terminated all cativity on all channels, at which point the ll_dma_is_enable() function returns 0.

Register	BitsName
CFG_REG	CFG_EN

Parameters

DMAx	DMA instance.

Return values

None

ll_dma_disable_channel()

__STATIC_INLINE void ll_dma_disable_channel	(	dma_regs_t *	DMAx,
		uint32_t	channel
	)

Disable DMA channel.

Register	BitsName
CH_EN_REG	CH_EN_WE&CH_EN

Parameters

DMAx	DMA instance.
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7

Return values

None

ll_dma_enable()

__STATIC_INLINE void ll_dma_enable

(

dma_regs_t *

DMAx

)

Enable DMA Module.

Note

This function is used to enable the DMA Module, which must be done before any channel activity can begin.

Register	BitsName
CFG_REG	CFG_EN

Parameters

DMAx	DMA instance.

Return values

None

ll_dma_enable_channel()

__STATIC_INLINE void ll_dma_enable_channel	(	dma_regs_t *	DMAx,
		uint32_t	channel
	)

Enable DMA channel.

Note

When the DMA Module is disabled, then call this function to DMA_CFG_REG register is ignored and call ll_dma_disable_channel() function will always returns 0.

Register	BitsName
CH_EN_REG	CH_EN_WE&CH_EN

Parameters

DMAx	DMA instance.
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7

Return values

None

ll_dma_get_block_size()

__STATIC_INLINE uint32_t ll_dma_get_block_size	(	dma_regs_t *	DMAx,
		uint32_t	channel
	)

Get the block size of a transfer.

Note

Once the channel is enabled, the return value indicate the remaining bytes to be transmitted.

Register	BitsName
CTL_HI	BLOCK_TS

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7

Return values

Between

Min_Data = 0 and Max_Data = 0xFFF

ll_dma_get_channel_priority_level()

__STATIC_INLINE uint32_t ll_dma_get_channel_priority_level	(	dma_regs_t *	DMAx,
		uint32_t	channel
	)

Get Channel priority level.

Register	BitsName
CFG_LO	CH_PRIOR

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7

Return values

Returned

value can be one of the following values: LL_DMA_PRIORITY_0 LL_DMA_PRIORITY_1 LL_DMA_PRIORITY_2 LL_DMA_PRIORITY_3 LL_DMA_PRIORITY_4 LL_DMA_PRIORITY_5 LL_DMA_PRIORITY_6 LL_DMA_PRIORITY_7

ll_dma_get_data_transfer_direction()

__STATIC_INLINE uint32_t ll_dma_get_data_transfer_direction	(	dma_regs_t *	DMAx,
		uint32_t	channel
	)

Get Data transfer direction (read from peripheral or from memory).

Register	BitsName
CTL_LO	TT_FC

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7

Return values

Returned

value can be one of the following values: LL_DMA_DIRECTION_MEMORY_TO_MEMORY LL_DMA_DIRECTION_MEMORY_TO_PERIPH LL_DMA_DIRECTION_PERIPH_TO_MEMORY LL_DMA_DIRECTION_PERIPH_TO_PERIPH

ll_dma_get_destination_address()

__STATIC_INLINE uint32_t ll_dma_get_destination_address	(	dma_regs_t *	DMAx,
		uint32_t	channel
	)

Get Destination address.

Register	BitsName
DAR	DAR

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7

Return values

Between

Min_Data = 0 and Max_Data = 0xFFFFFFFF

ll_dma_get_destination_burst_length()

__STATIC_INLINE uint32_t ll_dma_get_destination_burst_length	(	dma_regs_t *	DMAx,
		uint32_t	channel
	)

Get Destination Burst Transaction Length.

Register	BitsName
CTL_LO	DST_MSIZE

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7

Return values

Returned

value can be one of the following values: LL_DMA_DST_BURST_LENGTH_1 LL_DMA_DST_BURST_LENGTH_4 LL_DMA_DST_BURST_LENGTH_8

ll_dma_get_destination_increment_mode()

__STATIC_INLINE uint32_t ll_dma_get_destination_increment_mode	(	dma_regs_t *	DMAx,
		uint32_t	channel
	)

Get Destination increment mode.

Register	BitsName
CTL_LO	DINC

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7

Return values

Returned

value can be one of the following values: LL_DMA_DST_INCREMENT LL_DMA_DST_DECREMENT LL_DMA_DST_NO_CHANGE

ll_dma_get_destination_peripheral()

__STATIC_INLINE uint32_t ll_dma_get_destination_peripheral	(	dma_regs_t *	DMAx,
		uint32_t	channel
	)

Get destination peripheral for DMA instance on Channel x.

Register	BitsName
CFG_HI	DST_PER

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7

Return values

Returned

value can be one of the following values: LL_DMA_PERIPH_SPIM_TX LL_DMA_PERIPH_SPIM_RX LL_DMA_PERIPH_SPIS_TX LL_DMA_PERIPH_SPIS_RX LL_DMA_PERIPH_QSPI0_TX LL_DMA_PERIPH_QSPI0_RX LL_DMA_PERIPH_I2C0_TX LL_DMA_PERIPH_I2C0_RX LL_DMA_PERIPH_I2C1_TX LL_DMA_PERIPH_I2C1_RX LL_DMA_PERIPH_I2S_S_TX LL_DMA_PERIPH_I2S_S_RX LL_DMA_PERIPH_UART0_TX LL_DMA_PERIPH_UART0_RX LL_DMA_PERIPH_QSPI1_TX LL_DMA_PERIPH_QSPI1_RX LL_DMA_PERIPH_I2S_M_TX LL_DMA_PERIPH_I2S_M_RX LL_DMA_PERIPH_SNSADC

ll_dma_get_destination_width()

__STATIC_INLINE uint32_t ll_dma_get_destination_width	(	dma_regs_t *	DMAx,
		uint32_t	channel
	)

Get Destination transfer width.

Register	BitsName
CTL_LO	DST_TR_WIDTH

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7

Return values

Returned

value can be one of the following values: LL_DMA_DDATAALIGN_BYTE LL_DMA_DDATAALIGN_HALFWORD LL_DMA_DDATAALIGN_WORD

ll_dma_get_m2m_dst_address()

__STATIC_INLINE uint32_t ll_dma_get_m2m_dst_address	(	dma_regs_t *	DMAx,
		uint32_t	channel
	)

Get the Memory to Memory Destination address.

Note

Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.

Register	BitsName
DAR	DAR

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7

Return values

Between

Min_Data = 0 and Max_Data = 0xFFFFFFFF

ll_dma_get_m2m_src_address()

__STATIC_INLINE uint32_t ll_dma_get_m2m_src_address	(	dma_regs_t *	DMAx,
		uint32_t	channel
	)

Get the Memory to Memory Source address.

Note

Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.

Register	BitsName
SAR	SAR

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7

Return values

Between

Min_Data = 0 and Max_Data = 0xFFFFFFFF

ll_dma_get_mode()

__STATIC_INLINE uint32_t ll_dma_get_mode	(	dma_regs_t *	DMAx,
		uint32_t	channel
	)

Get DMA mode circular or normal.

Register	BitsName
CFG_LO	RELOAD_DST

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7

Return values

Returned

value can be one of the following values: LL_DMA_MODE_SINGLE_BLOCK LL_DMA_MODE_MULTI_BLOCK_SRC_RELOAD LL_DMA_MODE_MULTI_BLOCK_DST_RELOAD LL_DMA_MODE_MULTI_BLOCK_ALL_RELOAD

ll_dma_get_source_address()

__STATIC_INLINE uint32_t ll_dma_get_source_address	(	dma_regs_t *	DMAx,
		uint32_t	channel
	)

Get Source address.

Register	BitsName
SAR	SAR

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7

Return values

Between

Min_Data = 0 and Max_Data = 0xFFFFFFFF

ll_dma_get_source_burst_length()

__STATIC_INLINE uint32_t ll_dma_get_source_burst_length	(	dma_regs_t *	DMAx,
		uint32_t	channel
	)

Get Burst Transaction Length.

Register	BitsName
CTL_LO	SRC_MSIZE

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7

Return values

Returned

value can be one of the following values: LL_DMA_SRC_BURST_LENGTH_1 LL_DMA_SRC_BURST_LENGTH_4 LL_DMA_SRC_BURST_LENGTH_8

ll_dma_get_source_increment_mode()

__STATIC_INLINE uint32_t ll_dma_get_source_increment_mode	(	dma_regs_t *	DMAx,
		uint32_t	channel
	)

Get Source increment mode.

Register	BitsName
CTL_LO	SINC

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7

Return values

Returned

value can be one of the following values: LL_DMA_SRC_INCREMENT LL_DMA_SRC_DECREMENT LL_DMA_SRC_NO_CHANGE

ll_dma_get_source_peripheral()

__STATIC_INLINE uint32_t ll_dma_get_source_peripheral	(	dma_regs_t *	DMAx,
		uint32_t	channel
	)

Get source peripheral for DMA instance on Channel x.

Register	BitsName
CFG_HI	SRC_PER

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7

Return values

Returned

value can be one of the following values: LL_DMA_PERIPH_SPIM_TX LL_DMA_PERIPH_SPIM_RX LL_DMA_PERIPH_SPIS_TX LL_DMA_PERIPH_SPIS_RX LL_DMA_PERIPH_QSPI0_TX LL_DMA_PERIPH_QSPI0_RX LL_DMA_PERIPH_I2C0_TX LL_DMA_PERIPH_I2C0_RX LL_DMA_PERIPH_I2C1_TX LL_DMA_PERIPH_I2C1_RX LL_DMA_PERIPH_I2S_S_TX LL_DMA_PERIPH_I2S_S_RX LL_DMA_PERIPH_UART0_TX LL_DMA_PERIPH_UART0_RX LL_DMA_PERIPH_QSPI1_TX LL_DMA_PERIPH_QSPI1_RX LL_DMA_PERIPH_I2S_M_TX LL_DMA_PERIPH_I2S_M_RX LL_DMA_PERIPH_SNSADC

ll_dma_get_source_width()

__STATIC_INLINE uint32_t ll_dma_get_source_width	(	dma_regs_t *	DMAx,
		uint32_t	channel
	)

Get Source transfer width.

Register	BitsName
CTL_LO	SRC_TR_WIDTH

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7

Return values

Returned

value can be one of the following values: LL_DMA_SDATAALIGN_BYTE LL_DMA_SDATAALIGN_HALFWORD LL_DMA_SDATAALIGN_WORD

ll_dma_is_empty_fifo()

__STATIC_INLINE uint32_t ll_dma_is_empty_fifo	(	dma_regs_t *	DMAx,
		uint32_t	channel
	)

Check if DMA channel FIFO is empty.

Register	BitsName
CFGL	FIFO_EMPTY

Parameters

DMAx	DMA instance.
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7

Return values

State

of bit (1 or 0).

ll_dma_is_enable()

__STATIC_INLINE uint32_t ll_dma_is_enable

(

dma_regs_t *

DMAx

)

Check if DMA Module is enabled or disabled.

Register	BitsName
CFG_REG	CFG_EN

Parameters

DMAx	DMA instance.

Return values

State

of bit (1 or 0).

ll_dma_is_enabled_channel()

__STATIC_INLINE uint32_t ll_dma_is_enabled_channel	(	dma_regs_t *	DMAx,
		uint32_t	channel
	)

Check if DMA channel is enabled or disabled.

Note

Software can therefore poll this function to determine when channel is free for a new DMA transfer.

Register	BitsName
CH_EN_REG	CH_EN_WE&CH_EN

Parameters

DMAx	DMA instance.
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7

Return values

State

of bit (1 or 0).

ll_dma_is_suspended()

__STATIC_INLINE uint32_t ll_dma_is_suspended	(	dma_regs_t *	DMAx,
		uint32_t	channel
	)

Check if DMA channel is suspended or resumed.

Register	BitsName
CFGL	CH_SUSP

Parameters

DMAx	DMA instance.
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7

Return values

State

of bit (1 or 0).

ll_dma_req_dst_burst_transaction()

__STATIC_INLINE void ll_dma_req_dst_burst_transaction	(	dma_regs_t *	DMAx,
		uint32_t	channel
	)

Destination Burst Transaction Request.

Register	BitsName
REQ_DST	DST_WE&DST

Parameters

DMAx	DMA instance.
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7

Return values

None

ll_dma_req_dst_last_burst_transaction()

__STATIC_INLINE void ll_dma_req_dst_last_burst_transaction	(	dma_regs_t *	DMAx,
		uint32_t	channel
	)

Destination Last Burst Transaction Request.

Register	BitsName
LST_DST	LST_DST_WE&LST_DST
REQ_DST	DST_WE&DST

Parameters

DMAx	DMA instance.
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7

Return values

None

ll_dma_req_dst_last_single_transaction()

__STATIC_INLINE void ll_dma_req_dst_last_single_transaction	(	dma_regs_t *	DMAx,
		uint32_t	channel
	)

Destination Last Single Transaction Request.

Register	BitsName
SGL_REQ_DST	REQ_DST_WE&REQ_DST
LST_DST	LST_DST_WE&LST_DST
REQ_DST	DST_WE&DST

Parameters

DMAx	DMA instance.
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7

Return values

None

ll_dma_req_dst_single_transaction()

__STATIC_INLINE void ll_dma_req_dst_single_transaction	(	dma_regs_t *	DMAx,
		uint32_t	channel
	)

Destination Single Transaction Request.

Register	BitsName
SGL_REQ_DST	REQ_DST_WE&REQ_DST
REQ_DST	DST_WE&DST

Parameters

DMAx	DMA instance.
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7

Return values

None

ll_dma_req_src_burst_transaction()

__STATIC_INLINE void ll_dma_req_src_burst_transaction	(	dma_regs_t *	DMAx,
		uint32_t	channel
	)

Source Burst Transaction Request.

Register	BitsName
REQ_SRC	SRC_WE&SRC

Parameters

DMAx	DMA instance.
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7

Return values

None

ll_dma_req_src_last_burst_transaction()

__STATIC_INLINE void ll_dma_req_src_last_burst_transaction	(	dma_regs_t *	DMAx,
		uint32_t	channel
	)

Source Last Burst Transaction Request.

Register	BitsName
LST_SRC	LST_SRC_WE&LST_SRC
REQ_SRC	SRC_WE&SRC

Parameters

DMAx	DMA instance.
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7

Return values

None

ll_dma_req_src_last_single_transaction()

__STATIC_INLINE void ll_dma_req_src_last_single_transaction	(	dma_regs_t *	DMAx,
		uint32_t	channel
	)

Source Last Single Transaction Request.

Register	BitsName
SGL_REQ_SRC	REQ_SRC_WE&REQ_SRC
LST_SRC	LST_SRC_WE&LST_SRC
REQ_SRC	SRC_WE&SRC

Parameters

DMAx	DMA instance.
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7

Return values

None

ll_dma_req_src_single_transaction()

__STATIC_INLINE void ll_dma_req_src_single_transaction	(	dma_regs_t *	DMAx,
		uint32_t	channel
	)

Source Single Transaction Request.

Register	BitsName
SGL_REQ_SRC	REQ_SRC_WE&REQ_SRC
REQ_SRC	SRC_WE&SRC

Parameters

DMAx	DMA instance.
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7

Return values

None

ll_dma_resume_channel()

__STATIC_INLINE void ll_dma_resume_channel	(	dma_regs_t *	DMAx,
		uint32_t	channel
	)

Resume a DMA channel.

Note

The function may be called after enabling the DMA channel.

Register	BitsName
CFGL	CH_SUSP

Parameters

DMAx	DMA instance.
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7

Return values

None

ll_dma_select_handshaking()

__STATIC_INLINE void ll_dma_select_handshaking	(	dma_regs_t *	DMAx,
		uint32_t	channel,
		uint32_t	src_handshaking,
		uint32_t	dst_handshaking
	)

Set source and destination source handshaking interface.

Register	BitsName
CFG_HI	DST_PER

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7
src_handshaking	This parameter can be one of the following values: LL_DMA_SHANDSHAKING_HW LL_DMA_SHANDSHAKING_HW
dst_handshaking	This parameter can be one of the following values: LL_DMA_DHANDSHAKING_HW LL_DMA_DHANDSHAKING_HW

Return values

None

ll_dma_set_block_size()

__STATIC_INLINE void ll_dma_set_block_size	(	dma_regs_t *	DMAx,
		uint32_t	channel,
		uint32_t	block_size
	)

Set the block size of a transfer.

Note

This action has no effect if channel is enabled.

Register	BitsName
CTL_HI	BLOCK_TS

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7
block_size	Between Min_Data = 0 and Max_Data = 0xFFF

Return values

None

ll_dma_set_channel_priority_level()

__STATIC_INLINE void ll_dma_set_channel_priority_level	(	dma_regs_t *	DMAx,
		uint32_t	channel,
		uint32_t	priority
	)

Set Channel priority level.

Register	BitsName
CFG_LO	CH_PRIOR

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7
priority	This parameter can be one of the following values: LL_DMA_PRIORITY_0 LL_DMA_PRIORITY_1 LL_DMA_PRIORITY_2 LL_DMA_PRIORITY_3 LL_DMA_PRIORITY_4 LL_DMA_PRIORITY_5 LL_DMA_PRIORITY_6 LL_DMA_PRIORITY_7

Return values

None

ll_dma_set_data_transfer_direction()

__STATIC_INLINE void ll_dma_set_data_transfer_direction	(	dma_regs_t *	DMAx,
		uint32_t	channel,
		uint32_t	direction
	)

Set Data transfer direction (read from peripheral or from memory).

Register	BitsName
CTL_LO	TT_FC

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7
direction	This parameter can be one of the following values: LL_DMA_DIRECTION_MEMORY_TO_MEMORY LL_DMA_DIRECTION_MEMORY_TO_PERIPH LL_DMA_DIRECTION_PERIPH_TO_MEMORY LL_DMA_DIRECTION_PERIPH_TO_PERIPH

Return values

None

ll_dma_set_destination_address()

__STATIC_INLINE void ll_dma_set_destination_address	(	dma_regs_t *	DMAx,
		uint32_t	channel,
		uint32_t	address
	)

Set the Destination address.

Register	BitsName
DAR	DAR

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7
address	Between Min_Data = 0 and Max_Data = 0xFFFFFFFF

Return values

None

ll_dma_set_destination_burst_length()

__STATIC_INLINE void ll_dma_set_destination_burst_length	(	dma_regs_t *	DMAx,
		uint32_t	channel,
		uint32_t	burst_length
	)

Set Destination Burst Transaction Length.

Register	BitsName
CTL_LO	DST_MSIZE

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7
burst_length	This parameter can be one of the following values: LL_DMA_DST_BURST_LENGTH_1 LL_DMA_DST_BURST_LENGTH_4 LL_DMA_DST_BURST_LENGTH_8

Return values

None

ll_dma_set_destination_increment_mode()

__STATIC_INLINE void ll_dma_set_destination_increment_mode	(	dma_regs_t *	DMAx,
		uint32_t	channel,
		uint32_t	dst_increment_mode
	)

Set Destination increment mode.

Register	BitsName
CTL_LO	DINC

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7
dst_increment_mode	This parameter can be one of the following values: LL_DMA_DST_INCREMENT LL_DMA_DST_DECREMENT LL_DMA_DST_NO_CHANGE

Return values

None

ll_dma_set_destination_peripheral()

__STATIC_INLINE void ll_dma_set_destination_peripheral	(	dma_regs_t *	DMAx,
		uint32_t	channel,
		uint32_t	peripheral
	)

Set destination peripheral for DMA instance on Channel x.

Register	BitsName
CFG_HI	DST_PER

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7
peripheral	This parameter can be one of the following values: LL_DMA_PERIPH_SPIM_TX LL_DMA_PERIPH_SPIM_RX LL_DMA_PERIPH_SPIS_TX LL_DMA_PERIPH_SPIS_RX LL_DMA_PERIPH_QSPI0_TX LL_DMA_PERIPH_QSPI0_RX LL_DMA_PERIPH_I2C0_TX LL_DMA_PERIPH_I2C0_RX LL_DMA_PERIPH_I2C1_TX LL_DMA_PERIPH_I2C1_RX LL_DMA_PERIPH_I2S_S_TX LL_DMA_PERIPH_I2S_S_RX LL_DMA_PERIPH_UART0_TX LL_DMA_PERIPH_UART0_RX LL_DMA_PERIPH_QSPI1_TX LL_DMA_PERIPH_QSPI1_RX LL_DMA_PERIPH_I2S_M_TX LL_DMA_PERIPH_I2S_M_RX LL_DMA_PERIPH_SNSADC

Return values

None

ll_dma_set_destination_width()

__STATIC_INLINE void ll_dma_set_destination_width	(	dma_regs_t *	DMAx,
		uint32_t	channel,
		uint32_t	dst_width
	)

Set Destination transfer width.

Register	BitsName
CTL_LO	DST_TR_WIDTH

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7
dst_width	This parameter can be one of the following values: LL_DMA_DDATAALIGN_BYTE LL_DMA_DDATAALIGN_HALFWORD LL_DMA_DDATAALIGN_WORD

Return values

None

ll_dma_set_m2m_dst_address()

__STATIC_INLINE void ll_dma_set_m2m_dst_address	(	dma_regs_t *	DMAx,
		uint32_t	channel,
		uint32_t	address
	)

Set the Memory to Memory Destination address.

Note

Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.

Register	BitsName
DAR	DAR
CTL_LO	TT_FC

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7
address	Between Min_Data = 0 and Max_Data = 0xFFFFFFFF

Return values

None

ll_dma_set_m2m_src_address()

__STATIC_INLINE void ll_dma_set_m2m_src_address	(	dma_regs_t *	DMAx,
		uint32_t	channel,
		uint32_t	address
	)

Set the Memory to Memory Source address.

Note

Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.

Register	BitsName
SAR	SAR
CTL_LO	TT_FC

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7
address	Between Min_Data = 0 and Max_Data = 0xFFFFFFFF

Return values

None

ll_dma_set_mode()

__STATIC_INLINE void ll_dma_set_mode	(	dma_regs_t *	DMAx,
		uint32_t	channel,
		uint32_t	mode
	)

Set DMA mode Single block or Multi block.

Note

The circular buffer mode cannot be used if the memory-to-memory data transfer is configured on the selected Channel.

Register	BitsName
CFG_LO	RELOAD_DST

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7
mode	This parameter can be one of the following values: LL_DMA_MODE_SINGLE_BLOCK LL_DMA_MODE_MULTI_BLOCK_SRC_RELOAD LL_DMA_MODE_MULTI_BLOCK_DST_RELOAD LL_DMA_MODE_MULTI_BLOCK_ALL_RELOAD

Return values

None

ll_dma_set_source_address()

__STATIC_INLINE void ll_dma_set_source_address	(	dma_regs_t *	DMAx,
		uint32_t	channel,
		uint32_t	address
	)

Set the Source address.

Register	BitsName
SAR	SAR

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7
address	Between Min_Data = 0 and Max_Data = 0xFFFFFFFF

Return values

None

ll_dma_set_source_burst_length()

__STATIC_INLINE void ll_dma_set_source_burst_length	(	dma_regs_t *	DMAx,
		uint32_t	channel,
		uint32_t	burst_length
	)

Set Source Burst Transaction Length.

Register	BitsName
CTL_LO	SRC_MSIZE

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7
burst_length	This parameter can be one of the following values: LL_DMA_SRC_BURST_LENGTH_1 LL_DMA_SRC_BURST_LENGTH_4 LL_DMA_SRC_BURST_LENGTH_8

Return values

None

ll_dma_set_source_increment_mode()

__STATIC_INLINE void ll_dma_set_source_increment_mode	(	dma_regs_t *	DMAx,
		uint32_t	channel,
		uint32_t	src_increment_mode
	)

Set Source increment mode.

Register	BitsName
CTL_LO	SINC

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7
src_increment_mode	This parameter can be one of the following values: LL_DMA_SRC_INCREMENT LL_DMA_SRC_DECREMENT LL_DMA_SRC_NO_CHANGE

Return values

None

ll_dma_set_source_peripheral()

__STATIC_INLINE void ll_dma_set_source_peripheral	(	dma_regs_t *	DMAx,
		uint32_t	channel,
		uint32_t	peripheral
	)

Set source peripheral for DMA instance on Channel x.

Register	BitsName
CFG_HI	SRC_PER

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7
peripheral	This parameter can be one of the following values: LL_DMA_PERIPH_SPIM_TX LL_DMA_PERIPH_SPIM_RX LL_DMA_PERIPH_SPIS_TX LL_DMA_PERIPH_SPIS_RX LL_DMA_PERIPH_QSPI0_TX LL_DMA_PERIPH_QSPI0_RX LL_DMA_PERIPH_I2C0_TX LL_DMA_PERIPH_I2C0_RX LL_DMA_PERIPH_I2C1_TX LL_DMA_PERIPH_I2C1_RX LL_DMA_PERIPH_I2S_S_TX LL_DMA_PERIPH_I2S_S_RX LL_DMA_PERIPH_UART0_TX LL_DMA_PERIPH_UART0_RX LL_DMA_PERIPH_QSPI1_TX LL_DMA_PERIPH_QSPI1_RX LL_DMA_PERIPH_I2S_M_TX LL_DMA_PERIPH_I2S_M_RX LL_DMA_PERIPH_SNSADC

Return values

None

ll_dma_set_source_width()

__STATIC_INLINE void ll_dma_set_source_width	(	dma_regs_t *	DMAx,
		uint32_t	channel,
		uint32_t	src_width
	)

Set Source transfer width.

Register	BitsName
CTL_LO	SRC_TR_WIDTH

Parameters

DMAx	DMAx instance
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7
src_width	This parameter can be one of the following values: LL_DMA_SDATAALIGN_BYTE LL_DMA_SDATAALIGN_HALFWORD LL_DMA_SDATAALIGN_WORD

Return values

None

ll_dma_suspend_channel()

__STATIC_INLINE void ll_dma_suspend_channel	(	dma_regs_t *	DMAx,
		uint32_t	channel
	)

Suspend a DMA channel transfer.

Note

Suspends all DMA data transfers from the source until the ll_dma_resume_channel() function is called. The function may be called after enabling the DMA channel.

Register	BitsName
CFGL	CH_SUSP

Parameters

DMAx	DMA instance.
channel	This parameter can be one of the following values: LL_DMA_CHANNEL_0 LL_DMA_CHANNEL_1 LL_DMA_CHANNEL_2 LL_DMA_CHANNEL_3 LL_DMA_CHANNEL_4 LL_DMA_CHANNEL_5 LL_DMA_CHANNEL_6 LL_DMA_CHANNEL_7

Return values

None