gr533x_ll_xqspi.h File Reference

Header file containing functions prototypes of XQSPI LL library. More...

#include "gr533x.h"

Go to the source code of this file.

Classes
struct	_ll_xqspi_hp_init_t
	XQSPI High Performance mode init structures definition. More...
struct	_ll_xqspi_init_t
	XQSPI init structures definition. More...

Macros
#define	LL_XQSPI_HP_MODE_DIS   0
#define	LL_XQSPI_HP_MODE_EN   1
#define	LL_XQSPI_MODE_XIP   0
#define	LL_XQSPI_MODE_QSPI   1
#define	LL_XQSPI_XIP_CMD_READ   0x03
#define	LL_XQSPI_XIP_CMD_FAST_READ   0x0B
#define	LL_XQSPI_XIP_CMD_DUAL_OUT_READ   0x3B
#define	LL_XQSPI_XIP_CMD_DUAL_IO_READ   0xBB
#define	LL_XQSPI_XIP_CMD_QUAD_OUT_READ   0x6B
#define	LL_XQSPI_XIP_CMD_QUAD_IO_READ   0xEB
#define	LL_XQSPI_XIP_SS0   (1UL << XQSPI_XIP_CFG_SS_Pos)
#define	LL_XQSPI_XIP_SS1   (2UL << XQSPI_XIP_CFG_SS_Pos)
#define	LL_XQSPI_XIP_SS2   (4UL << XQSPI_XIP_CFG_SS_Pos)
#define	LL_XQSPI_XIP_SS3   (8UL << XQSPI_XIP_CFG_SS_Pos)
#define	LL_XQSPI_XIP_ADDR_3BYTES   0x00000000UL
#define	LL_XQSPI_XIP_ADDR_4BYTES   XQSPI_XIP_CFG_ADDR4
#define	LL_XQSPI_XIP_ENDIAN_BIG   0x00000000UL
#define	LL_XQSPI_XIP_ENDIAN_LITTLE   XQSPI_XIP_CFG_LE32
#define	LL_XQSPI_CACHE_DIS   0
#define	LL_XQSPI_CACHE_EN   1
#define	LL_XQSPI_CACHE_FIFO_NORMAL   0x00000000UL
#define	LL_XQSPI_CACHE_FIFO_CLEAR   XQSPI_CACHE_CTRL0_FIFO
#define	LL_XQSPI_CACHE_HITMISS_NORMAL   0x00000000UL
#define	LL_XQSPI_CACHE_HITMISS_CLEAR   XQSPI_CACHE_CTRL0_HITMISS
#define	LL_XQSPI_QSPI_STAT_RFTF   XQSPI_QSPI_STAT_RXWMARK
#define	LL_XQSPI_QSPI_STAT_RFF   XQSPI_QSPI_STAT_RXFULL
#define	LL_XQSPI_QSPI_STAT_RFE   XQSPI_QSPI_STAT_RXEMPTY
#define	LL_XQSPI_QSPI_STAT_TFTF   XQSPI_QSPI_STAT_TXWMARK
#define	LL_XQSPI_QSPI_STAT_TFF   XQSPI_QSPI_STAT_TXFULL
#define	LL_XQSPI_QSPI_STAT_TFE   XQSPI_QSPI_STAT_TXEMPTY
#define	LL_XQSPI_QSPI_STAT_BUSY   XQSPI_QSPI_STAT_XFERIP
#define	LL_XQSPI_QSPI_IM_DONE   XQSPI_QSPI_XFER_DPULSE_Msk
#define	LL_XQSPI_QSPI_IM_RFF   XQSPI_QSPI_RX_FPULSE_Msk
#define	LL_XQSPI_QSPI_IM_RFTF   XQSPI_QSPI_RX_WPULSE_Msk
#define	LL_XQSPI_QSPI_IM_TFTF   XQSPI_QSPI_TX_WPULSE_Msk
#define	LL_XQSPI_QSPI_IM_TFE   XQSPI_QSPI_TX_EPULSE_Msk
#define	LL_XQSPI_QSPI_IS_DONE   XQSPI_QSPI_XFER_DPULSE_Msk
#define	LL_XQSPI_QSPI_IS_RFF   XQSPI_QSPI_RX_FPULSE_Msk
#define	LL_XQSPI_QSPI_IS_RFTF   XQSPI_QSPI_RX_WPULSE_Msk
#define	LL_XQSPI_QSPI_IS_TFTF   XQSPI_QSPI_TX_WPULSE_Msk
#define	LL_XQSPI_QSPI_IS_TFE   XQSPI_QSPI_TX_EPULSE_Msk
#define	LL_XQSPI_QSPI_FIFO_WATERMARK_1_8   0UL
#define	LL_XQSPI_QSPI_FIFO_WATERMARK_1_4   1UL
#define	LL_XQSPI_QSPI_FIFO_WATERMARK_1_2   2UL
#define	LL_XQSPI_QSPI_FIFO_WATERMARK_3_4   3UL
#define	LL_XQSPI_QSPI_FIFO_DEPTH   8UL
#define	LL_XQSPI_QSPI_FRF_SPI   0x00000000UL
#define	LL_XQSPI_QSPI_FRF_DUALSPI   (2UL << XQSPI_QSPI_AUXCTRL_QMODE_Pos)
#define	LL_XQSPI_QSPI_FRF_QUADSPI   (3UL << XQSPI_QSPI_AUXCTRL_QMODE_Pos)
#define	LL_XQSPI_QSPI_LSB   0x00000000UL
#define	LL_XQSPI_QSPI_MSB   XQSPI_QSPI_CTRL_MSB1ST
#define	LL_XQSPI_QSPI_DATASIZE_4BIT   0x00000000UL
#define	LL_XQSPI_QSPI_DATASIZE_8BIT   (1UL << XQSPI_QSPI_AUXCTRL_BITSIZE_Pos)
#define	LL_XQSPI_QSPI_DATASIZE_12BIT   (2UL << XQSPI_QSPI_AUXCTRL_BITSIZE_Pos)
#define	LL_XQSPI_QSPI_DATASIZE_16BIT   (3UL << XQSPI_QSPI_AUXCTRL_BITSIZE_Pos)
#define	LL_XQSPI_QSPI_DATASIZE_20BIT   (4UL << XQSPI_QSPI_AUXCTRL_BITSIZE_Pos)
#define	LL_XQSPI_QSPI_DATASIZE_24BIT   (5UL << XQSPI_QSPI_AUXCTRL_BITSIZE_Pos)
#define	LL_XQSPI_QSPI_DATASIZE_28BIT   (6UL << XQSPI_QSPI_AUXCTRL_BITSIZE_Pos)
#define	LL_XQSPI_QSPI_DATASIZE_32BIT   (7UL << XQSPI_QSPI_AUXCTRL_BITSIZE_Pos)
#define	LL_XQSPI_SCPHA_1EDGE   0
#define	LL_XQSPI_SCPHA_2EDGE   1
#define	LL_XQSPI_SCPOL_LOW   0
#define	LL_XQSPI_SCPOL_HIGH   1
#define	LL_XQSPI_BAUD_RATE_64M   0x00000000UL
#define	LL_XQSPI_BAUD_RATE_48M   (1UL << AON_CTL_FLASH_CACHE_XF_SCK_CLK_SEL_Pos)
#define	LL_XQSPI_BAUD_RATE_32M   (2UL << AON_CTL_FLASH_CACHE_XF_SCK_CLK_SEL_Pos)
#define	LL_XQSPI_BAUD_RATE_24M   (3UL << AON_CTL_FLASH_CACHE_XF_SCK_CLK_SEL_Pos)
#define	LL_XQSPI_BAUD_RATE_16M   (4UL << AON_CTL_FLASH_CACHE_XF_SCK_CLK_SEL_Pos)
#define	LL_XQSPI_CACHE_DIRECT_MAP_DIS   0
#define	LL_XQSPI_CACHE_DIRECT_MAP_EN   1
#define	LL_XQSPI_CACHE_FLUSH_DIS   1
#define	LL_XQSPI_CACHE_FLUSH_EN   0
#define	LL_XQSPI_ENABLE_PRESENT   0
#define	LL_XQSPI_DISABLE_PRESENT   1
#define	LL_XQSPI_FLASH_WRITE_128BIT   0
#define	LL_XQSPI_FLASH_WRITE_32BIT   1
#define	LL_XQSPI_DEFAULT_CONFIG
	LL XQSPI InitStrcut default configuartion. More...
#define	LL_XQSPI_WriteReg(__instance__, __REG__, __VALUE__)   WRITE_REG(__instance__->__REG__, (__VALUE__))
	Write a value in XQSPI register. More...
#define	LL_XQSPI_ReadReg(__instance__, __REG__)   READ_REG(__instance__->__REG__)
	Read a value in XQSPI register. More...

Typedefs
typedef struct _ll_xqspi_hp_init_t	ll_xqspi_hp_init_t
	XQSPI High Performance mode init structures definition. More...
typedef struct _ll_xqspi_init_t	ll_xqspi_init_t
	XQSPI init structures definition. More...

Functions
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_enable_cache (xqspi_regs_t *XQSPIx)
	Enable cache function. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_disable_cache (xqspi_regs_t *XQSPIx)
	Disable cache function. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_is_enabled_cache (xqspi_regs_t *XQSPIx)
	Check if cache function is enabled. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_cache_direct_map_enable (xqspi_regs_t *XQSPIx)
	Enable cache direct map function. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_cache_direct_map_disable (xqspi_regs_t *XQSPIx)
	Disable cache direct map function. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_cache_direct_map_is_enabled (xqspi_regs_t *XQSPIx)
	Check if cache direct map function is enabled. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_enable_cache_flush (xqspi_regs_t *XQSPIx)
	Enable tag memory flush. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_disable_cache_flush (xqspi_regs_t *XQSPIx)
	Disable tag memory flush. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_is_enabled_cache_flush (xqspi_regs_t *XQSPIx)
	Check if tag memory flush is enabled. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_set_cache_clk_force_en (xqspi_regs_t *XQSPIx)
	Set cache gating dynamically. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_set_cache_fifo (xqspi_regs_t *XQSPIx, uint32_t mode)
	Set FIFO mode. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_cache_fifo (xqspi_regs_t *XQSPIx)
	Get FIFO mode. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_set_cache_hitmiss (xqspi_regs_t *XQSPIx, uint32_t mode)
	Set HIT/MISS mode. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_cache_hitmiss (xqspi_regs_t *XQSPIx)
	Get HIT/MISS mode. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_set_cache_dbgbus (xqspi_regs_t *XQSPIx, uint32_t sel)
	Set debugbus configurations signals. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_cache_dbgbus (xqspi_regs_t *XQSPIx)
	Get debugbus configurations signals. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_enable_cache_dbgmux (xqspi_regs_t *XQSPIx)
	Enable debug bus mux. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_disable_cache_dbgmux (xqspi_regs_t *XQSPIx)
	Disable debug bus mux. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_is_enabled_cache_dbgmux (xqspi_regs_t *XQSPIx)
	Check if debug bus mux is enabled. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_cache_hitcount (xqspi_regs_t *XQSPIx)
	Get hit counter. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_cache_misscount (xqspi_regs_t *XQSPIx)
	Get miss counter. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_cache_flag (xqspi_regs_t *XQSPIx)
	Get cache status. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_set_xip_cmd (xqspi_regs_t *XQSPIx, uint32_t cmd)
	Set read command. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_xip_cmd (xqspi_regs_t *XQSPIx)
	Get read command. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_enable_xip_hp (xqspi_regs_t *XQSPIx)
	Enable high performance mode. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_soft_rst_req (xqspi_regs_t *XQSPIx)
	Enable xqspi soft response request. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_disable_xip_hp (xqspi_regs_t *XQSPIx)
	Disable high performance mode. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_is_enabled_xip_hp (xqspi_regs_t *XQSPIx)
	Check if high performance mode is enabled. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_set_xip_ss (xqspi_regs_t *XQSPIx, uint32_t ss)
	Set slave select. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_xip_ss (xqspi_regs_t *XQSPIx)
	Get slave select. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_set_xip_cpha (xqspi_regs_t *XQSPIx, uint32_t cpha)
	Set clock phase. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_xip_cpha (xqspi_regs_t *XQSPIx)
	Get clock phase. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_set_xip_cpol (xqspi_regs_t *XQSPIx, uint32_t cpol)
	Set clock polarity. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_xip_cpol (xqspi_regs_t *XQSPIx)
	Get clock polarity. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_set_xip_addr_size (xqspi_regs_t *XQSPIx, uint32_t size)
	Set address bytes in command. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_xip_addr_size (xqspi_regs_t *XQSPIx)
	Get address bytes in command. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_set_xip_endian (xqspi_regs_t *XQSPIx, uint32_t endian)
	Set endian in reading data. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_xip_endian (xqspi_regs_t *XQSPIx)
	Get endian in reading data. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_set_xip_hp_cmd (xqspi_regs_t *XQSPIx, uint32_t cmd)
	Set high performance command. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_xip_hp_cmd (xqspi_regs_t *XQSPIx)
	Get high performance command. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_set_xip_dummycycles (xqspi_regs_t *XQSPIx, uint32_t cycles)
	Set dummy cycles in command. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_xip_dummycycles (xqspi_regs_t *XQSPIx)
	Get dummy cycles in command. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_set_xip_dummy_hp (xqspi_regs_t *XQSPIx, uint32_t cycles)
	Set dummy cycles in high performance end. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_xip_dummy_hp (xqspi_regs_t *XQSPIx)
	Get dummy cycles in high performance end. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_enable_xip (xqspi_regs_t *XQSPIx)
	Enable XIP mode. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_disable_xip (xqspi_regs_t *XQSPIx)
	Disable XIP mode. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_is_enabled_xip (xqspi_regs_t *XQSPIx)
	Check if XIP mode is enabled. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_xip_flag (xqspi_regs_t *XQSPIx)
	Get XIP status. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_is_enabled_xip_it (xqspi_regs_t *XQSPIx)
	Check if XIP interrupt is enabled. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_flag_xip_it (xqspi_regs_t *XQSPIx)
	Get XIP interrupt flag. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_req_xip_it (xqspi_regs_t *XQSPIx)
	Get XIP interrupt request. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_enable_xip_it (xqspi_regs_t *XQSPIx)
	Set XIP interrupt enable. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_disable_xip_it (xqspi_regs_t *XQSPIx)
	Set XIP interrupt disable. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_qspi_transmit_data8 (xqspi_regs_t *XQSPIx, uint8_t tx_data)
	Write 8-bit in the data register. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_qspi_transmit_data16 (xqspi_regs_t *XQSPIx, uint16_t tx_data)
	Write 16-bit in the data register. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_qspi_transmit_data32 (xqspi_regs_t *XQSPIx, uint32_t tx_data)
	Write 32-bit in the data register. More...
SECTION_RAM_CODE __STATIC_INLINE uint8_t	ll_xqspi_qspi_receive_data8 (xqspi_regs_t *XQSPIx)
	Read 8 bits in the data register. More...
SECTION_RAM_CODE __STATIC_INLINE uint16_t	ll_xqspi_qspi_receive_data16 (xqspi_regs_t *XQSPIx)
	Read 16 bits in the data register. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_qspi_receive_data32 (xqspi_regs_t *XQSPIx)
	Read 32 bits in the data register. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_set_qspi_tft (xqspi_regs_t *XQSPIx, uint32_t threshold)
	Set TX FIFO threshold level. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_qspi_tft (xqspi_regs_t *XQSPIx)
	Get TX FIFO threshold level. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_set_qspi_rft (xqspi_regs_t *XQSPIx, uint32_t threshold)
	Set RX FIFO threshold level. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_qspi_rft (xqspi_regs_t *XQSPIx)
	Get RX FIFO threshold level. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_enable_qspi_dummy (xqspi_regs_t *XQSPIx)
	Enable dummy cycles. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_disable_qspi_dummy (xqspi_regs_t *XQSPIx)
	Disable dummy cycles. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_is_enabled_qspi_dummy (xqspi_regs_t *XQSPIx)
	Check if dummy cycles is enabled. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_enable_qspi_dma (xqspi_regs_t *XQSPIx)
	Enable DMA mode. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_disable_qspi_dma (xqspi_regs_t *XQSPIx)
	Disable DMA mode. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_is_enabled_qspi_dma (xqspi_regs_t *XQSPIx)
	Check if DMA mode is enabled. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_set_qspi_cpol (xqspi_regs_t *XQSPIx, uint32_t cpol)
	Set clock polarity. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_qspi_cpol (xqspi_regs_t *XQSPIx)
	Get clock polarity. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_set_qspi_cpha (xqspi_regs_t *XQSPIx, uint32_t cpha)
	Set clock phase. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_qspi_cpha (xqspi_regs_t *XQSPIx)
	Get clock phase. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_set_qspi_data_order (xqspi_regs_t *XQSPIx, uint32_t order)
	Set serial data order. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_qspi_data_order (xqspi_regs_t *XQSPIx)
	Get serial data order. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_enable_qspi_contxfer (xqspi_regs_t *XQSPIx)
	Enable continuous transfer mode. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_disable_qspi_contxfer (xqspi_regs_t *XQSPIx)
	Disable continuous transfer mode. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_is_enabled_qspi_contxfer (xqspi_regs_t *XQSPIx)
	Check if continuous transfer mode is enabled. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_enable_qspi_contxfer_extend (xqspi_regs_t *XQSPIx)
	Enable continuous transfer extend mode. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_disable_qspi_contxfer_extend (xqspi_regs_t *XQSPIx)
	Disable continuous transfer extend mode. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_is_enabled_qspi_contxfer_extend (xqspi_regs_t *XQSPIx)
	Check if continuous transfer extend mode is enabled. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_set_qspi_datasize (xqspi_regs_t *XQSPIx, uint32_t szie)
	Set data size. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_qspi_datasize (xqspi_regs_t *XQSPIx)
	Get data size. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_enable_inhibt_rx (xqspi_regs_t *XQSPIx)
	Enable inhibt data input to RX FIFO. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_disable_inhibt_rx (xqspi_regs_t *XQSPIx)
	Disable inhibt data input to RX FIFO. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_is_enabled_inhibt_rx (xqspi_regs_t *XQSPIx)
	Check if inhibt data input to RX FIFO is enabled. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_enable_inhibt_tx (xqspi_regs_t *XQSPIx)
	Enable inhibt data output to TX FIFO. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_disable_inhibt_tx (xqspi_regs_t *XQSPIx)
	Disable inhibt data output to TX FIFO. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_is_enabled_inhibt_tx (xqspi_regs_t *XQSPIx)
	Check if inhibt data input to TX FIFO is enabled. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_set_qspi_frf (xqspi_regs_t *XQSPIx, uint32_t format)
	Set frame format. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_qspi_frf (xqspi_regs_t *XQSPIx)
	Get frame format. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_qspi_status (xqspi_regs_t *XQSPIx)
	Get QSPI status. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_is_active_qspi_flag (xqspi_regs_t *XQSPIx, uint32_t flag)
	Check active flag. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_enable_qspi_ssout (xqspi_regs_t *XQSPIx, uint32_t ssout)
	Enable slave select output. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_disable_qspi_ssout (xqspi_regs_t *XQSPIx, uint32_t ssout)
	Disable slave select output. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_set_qspi_sspol (xqspi_regs_t *XQSPIx, uint32_t sspol)
	Set slave select output polarity. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_qspi_sspol (xqspi_regs_t *XQSPIx)
	Get slave select output polarity. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_qspi_tx_fifo_level (xqspi_regs_t *XQSPIx)
	Get FIFO Transmission Level. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_qspi_rx_fifo_level (xqspi_regs_t *XQSPIx)
	Get FIFO reception Level. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_enable_qspi_it (xqspi_regs_t *XQSPIx, uint32_t mask)
	Enable interrupt. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_disable_qspi_it (xqspi_regs_t *XQSPIx, uint32_t mask)
	Disable interrupt. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_is_enabled_qspi_it (xqspi_regs_t *XQSPIx, uint32_t mask)
	Check if interrupt is enabled. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_it_flag (xqspi_regs_t *XQSPIx)
	Get XQSPI interrupt flags. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_is_qspi_it_flag (xqspi_regs_t *XQSPIx, uint32_t flag)
	Check interrupt flag. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_clear_qspi_flag (xqspi_regs_t *XQSPIx, uint32_t flag)
	Clear interrupt flag. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_set_qspi_wait (xqspi_regs_t *XQSPIx, uint32_t wait)
	Set master inter-transfer delay. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_qspi_wait (xqspi_regs_t *XQSPIx)
	Get master inter-transfer delay. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_enable_qspi (xqspi_regs_t *XQSPIx)
	Enable QSPI. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_disable_qspi (xqspi_regs_t *XQSPIx)
	Disable QSPI. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_is_enabled_qspi (xqspi_regs_t *XQSPIx)
	Check if QSPI is enabled. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_set_flash_write (xqspi_regs_t *XQSPIx, uint32_t bits)
	Set QSPI Flash write bits. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_flash_write (xqspi_regs_t *XQSPIx)
	Get QSPI Flash write bits. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_set_cs_idle_valid (xqspi_regs_t *XQSPIx)
	CS keeps valid while not reading. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_set_cs_idle_invalid (xqspi_regs_t *XQSPIx)
	CS keeps invalid while not reading. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_enable_1st_prefecth (xqspi_regs_t *XQSPIx)
	enable 1st prefecth function More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_disable_1st_prefecth (xqspi_regs_t *XQSPIx)
	disable 1st prefecth function More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_enable_key_pulse (xqspi_regs_t *XQSPIx)
	enable key_pulse to interrupt rd_data state More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_disable_key_pulse (xqspi_regs_t *XQSPIx)
	disable key_pulse to interrupt rd_data state More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_enable_exflash_power (void)
	Enable exflash power. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_disable_exflash_power (void)
	Disable exflash power. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_is_enable_exflash_power (void)
	Check if exflash power is enabled. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_set_qspi_speed (uint32_t speed)
	Set XQSPI serial clock. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_get_qspi_speed (void)
	Get XQSPI serial clock. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_enable_cache_retention (void)
	Enable cache data retention. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_disable_cache_retention (void)
	Disable cache data retention. More...
SECTION_RAM_CODE __STATIC_INLINE uint32_t	ll_xqspi_is_enable_cache_retention (void)
	Check if tag memory retention is enabled. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_enable_exflash_auto_power (void)
	Enable exflash power auto power up by hw. More...
SECTION_RAM_CODE __STATIC_INLINE void	ll_xqspi_disable_exflash_auto_power (void)
	Disable exflash power auto power up by hwr. More...
SECTION_RAM_CODE error_status_t	ll_xqspi_deinit (xqspi_regs_t *XQSPIx)
	De-initialize XQSPI registers (Registers restored to their default values). More...
SECTION_RAM_CODE error_status_t	ll_xqspi_init (xqspi_regs_t *XQSPIx, ll_xqspi_init_t *p_xqspi_init)
	Initialize XQSPI registers according to the specified parameters in default. More...
void	ll_xqspi_struct_init (ll_xqspi_init_t *p_xqspi_init)
	Set each field of a ll_xqspi_init_t type structure to default value. More...
SECTION_RAM_CODE void	ll_xqspi_set_xip_hp (ll_xqspi_hp_init_t *p_xqspi_hp_init)
	Initialize XQSPI XIP HP mode according to the specified parameters. More...

Detailed Description

Header file containing functions prototypes of XQSPI LL library.

Author

BLE SDK Team

Attention

#####Copyright (c) 2019 GOODIX All rights reserved.

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. Neither the name of GOODIX nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.

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Definition in file gr533x_ll_xqspi.h.