Wakeup Source
In order to reduce power consumption, the system will enter deep sleep mode when it is IDLE. In sleep mode, the MCU will be powered off and only the functional modules in the AON area work. In this case, the GR5526 SoC needs a wakeup source to wake the system up when it needs to work.
Currently the SoC supports multiple wakeup sources to wake the system up from deep sleep. Each wakeup source belongs to a different function and is independent of each other.
In deep sleep mode, the device can be woken up through one of the following modules:
- Bluetooth LE controller
- LPCOMP module
- RTC counter
- AON WDT
- Sleep timer
- AON GPIO peripheral
- BOD module
- USB device
- A reset
In ultra deep sleep mode, the device can be woken up through one of the following modules:
- AON GPIO peripheral
- Sleep timer
- A reset
The system is reset when being woken up from the ultra deep sleep mode.
The wakeup source can be enabled by configuring MCU_WAKEUP_CTRL. This wakeup source will wake the MCU up as a wakeup event after the MCU enters the sleep mode. By reading AON_SLP_EVENT, developers can find which wakeup source triggered the wakeup event. It is worth noting that AON_SLP_EVENT needs to be cleared before entering sleep; otherwise the MCU cannot enter sleep mode.
MCU_WAKEUP_CTRL
- Base Address: 0x4000A080
- Offset: 0x00
- Reset Value: 0x0000FFFF
No IRQ is generated if the corresponding source is disabled.
Bits | Field Name | RW | Reset | Description |
---|---|---|---|---|
31:16 | RSVD | R | 0x0 | Reserved bits |
15:12 | RSVD | R | 0x0 | Reserved bits |
11 | COMP_F | WR | 0x1 | PMU_MSIO_COMP_FALLING |
10 | BLE_IRQ2 | WR | 0x1 | BLE_MAC_IRQ |
9 | RTC_M2 | WR | 0x1 | RTC_M2, RTC COMPARE, tick event, overflow IRQ |
8 | USB_DETACH | WR | 0x1 | USB_DETACH |
7 | USB_ATTACH | WR | 0x1 | USB_ATTACH |
6 | WDT_COMPARE | WR | 0x1 | WD_TIMER_ALMOST_EXP |
5 | COMP_R | WR | 0x1 | PMU_MSIO_COMP_RISING |
4 | BOD | WR | 0x1 | PMU_BOD_FEDGE |
3 | RTC_M1 | RW | 0x1 | RTC_M1, RTC COMPARE, tick event, overflow IRQ |
2 | BLE | RW | 0x1 | BLE_TIMER |
1 | EXT | RW | 0x1 | EXT_WAKEUP |
0 | SLP_TIMER | RW | 0x1 | SLP_TIMER_EXP |
AON_SLP_EVENT
- Base Address: 0x4000A084
- Offset: 0x00
- Reset Value: 0x00000000
- Events that happen in sleep or active mode are controlled by MCU_WAKEUP_CTRL.
- To clear an individual event, do not use the conventional read-mask-write method, but simply write ~ (1<< EVENT_BIT) to AON_SLP_EVENT.
Bits | Field Name | RW | Reset | Description |
---|---|---|---|---|
31:16 | RSVD | R | 0x0 | Reserved bits |
15:12 | RSVD | R | 0x0 | Reserved bits |
11 | COMP_F | WR | 0x0 | PMU_MSIO_COMP_FALLING |
10 | BLE_IRQ2 | WR | 0x0 | BLE_MAC_IRQ |
9 | RTC_M2 | WR | 0x0 | RTC_M2, RTC COMPARE, tick event, overflow IRQ |
8 | USB_DETACH | WR | 0x0 | USB_DETACH |
7 | USB_ATTACH | WR | 0x0 | USB_ATTACH |
6 | WDT_COMPARE | WR | 0x0 | WD_TIMER_ALMOST_EXP |
5 | COMP_R | WR | 0x0 | PMU_MSIO_COMP_RISING |
4 | BOD | WR | 0x0 | PMU_BOD_FEDGE |
3 | RTC_M1 | RW | 0x0 | RTC_M1, RTC COMPARE, tick event, overflow IRQ |
2 | BLE | RW | 0x0 | BLE_TIMER |
1 | EXT | RW | 0x0 | EXT_WAKEUP |
0 | SLP_TIMER | RW | 0x0 | SLP_TIMER_EXP |